2集成电路CAD-MOS工艺课件

MOSMOSMOSMOS集成电路的工艺集成电路的工艺集成电路的工艺集成电路的工艺 P P P P阱阱阱阱CMOSCMOSCMOSCMOS工艺工艺工艺工艺 BiCMOSBiCMOSBiCMOSBiCMOS集成电路的工艺集成电路的工艺集成电路的工艺集成电路的工艺 N N N N阱阱阱阱CMOSCMOSCMOSCMOS工艺工艺工艺工艺 双阱双阱双阱双阱CMOSCMOSCMOSCMOS工艺工艺工艺工艺2024/4/23MOS晶体管的动作晶体管的动作 MOS晶体管实质上是一种使晶体管实质上是一种使电流时而流过，时而切断的电流时而流过，时而切断的开关开关开关开关n+n+P型硅基板型硅基板栅极（金属）栅极（金属）绝缘层（绝缘层（SiO2）半半导导体体基基板板漏极漏极源极源极N N沟沟沟沟MOSMOS晶体管的基本结构晶体管的基本结构晶体管的基本结构晶体管的基本结构源极源极(S)漏极漏极(D)栅极栅极(G)2024/4/23silicon substratesourcedraingategateoxideoxideoxideoxidetop oxidemetal connection to sourcemetal connection to gatemetal connection to drainpolysilicon gatedoped siliconfield oxidegate oxideMOS晶体管的立体结构晶体管的立体结构2024/4/23在硅在硅衬底上制作底上制作MOS晶体管晶体管silicon substrate2024/4/23silicon substrateoxideoxidefield oxide2024/4/23silicon substrateoxideoxidephotoresistphotoresist2024/4/23Shadow on photoresistphotoresistphotoresistExposed area of photoresistChrome platedglass maskUltraviolet Lightsilicon substrateoxideoxide2024/4/23非感光区域非感光区域silicon substrate感光区域感光区域oxideoxidephotoresistphotoresist2024/4/23Shadow on photoresistsilicon substrateoxideoxidephotoresistphotoresistphotoresist显影显影2024/4/23silicon substrateoxideoxideoxideoxidesilicon substratephotoresistphotoresist腐蚀腐蚀2024/4/23silicon substrateoxideoxideoxideoxidesilicon substratefield oxide去胶去胶2024/4/23silicon substrateoxideoxideoxideoxidegate oxidegate oxidethin oxide layer2024/4/23silicon substrateoxideoxideoxideoxidepolysiliconpolysilicongate oxide2024/4/23silicon substrateoxideoxideoxideoxidegategategateultra-thin gate oxidepolysilicongate2024/4/23silicon substrateoxideoxideoxideoxidegategategatephotoresistphotoresistScanning direction of ion beamimplanted ions in active region of transistorsImplanted ions in photoresist to be removed during resist strip.sourcedrainion beam2024/4/23silicon substrateoxideoxideoxideoxidegategategatesourcedraindoped silicon2024/4/23自自对准工准工艺1.1.在有源区上覆盖一层薄氧化层在有源区上覆盖一层薄氧化层2.2.淀积多晶硅，用多晶硅栅极版图淀积多晶硅，用多晶硅栅极版图刻蚀多晶硅刻蚀多晶硅3.3.以多晶硅栅极图形为掩膜板，刻以多晶硅栅极图形为掩膜板，刻蚀氧化膜蚀氧化膜4.4.离子注入离子注入2024/4/23silicon substratesourcedraingategate2024/4/23silicon substrategategatecontact holesdrainsource2024/4/23silicon substrategategatecontact holesdrainsource2024/4/23完整的完整的简单MOS晶体管晶体管结构构silicon substratesourcedraingategateoxideoxideoxideoxidetop oxidemetal connection to sourcemetal connection to gatemetal connection to drainpolysilicon gatedoped siliconfield oxidegate oxide2024/4/23CMOSFETP型型 si subn+gategateoxideoxiden+gategateoxideoxideoxideoxidep+p+2024/4/23VDDP阱工艺阱工艺N阱工艺阱工艺双阱工艺双阱工艺P-P+P+N+N+P+N+VSSVOUTVINVDDN-P+P+N+N+P+N+VSSVOUTVINVDDP-P+P+N+N+P+N+VSSVOUTVINN-SiP-SiN-I-SiN+-Si2024/4/23掩膜掩膜1：P阱光刻阱光刻P-wellP-well N+N+P+P+N+P+N-SiP2024/4/23具体步骤如下：具体步骤如下：1生长二氧化硅（湿法氧化）：生长二氧化硅（湿法氧化）：Si(固体固体)+2H2O SiO2（固体）（固体）+2H22024/4/232024/4/232P阱光刻：阱光刻：涂胶涂胶涂胶涂胶腌膜对准腌膜对准腌膜对准腌膜对准曝光曝光曝光曝光光源光源显影显影显影显影2024/4/232024/4/23硼掺杂（离子注入）硼掺杂（离子注入）硼掺杂（离子注入）硼掺杂（离子注入）刻蚀（等离子体刻蚀）刻蚀（等离子体刻蚀）刻蚀（等离子体刻蚀）刻蚀（等离子体刻蚀）去胶去胶去胶去胶P+去除氧化膜去除氧化膜去除氧化膜去除氧化膜P-well3P阱掺杂：阱掺杂：2024/4/232024/4/23离子源离子源离子源离子源高压高压高压高压电源电源电源电源电流电流积分积分器器离子束离子束离子束离子束2024/4/23掩膜掩膜2：光刻有源区光刻有源区有源区有源区：nMOS、PMOS 晶体管形成的区域晶体管形成的区域P+N+N+P+N-SiP-wellP-wellP-well 淀积氮化硅淀积氮化硅 光刻有源区光刻有源区 场区氧化场区氧化 去除有源区氮化硅及二氧化硅去除有源区氮化硅及二氧化硅SiO2隔离岛隔离岛2024/4/23有源区depositednitride layer有源区光刻板N型p型MOS制作区域(漏-栅-源)2024/4/23P-well1.淀积氮化硅：淀积氮化硅：氧化膜生长（湿法氧化）氧化膜生长（湿法氧化）P-well氮化膜生长氮化膜生长P-well涂胶涂胶P-well对版曝光对版曝光有源区光刻板有源区光刻板2.光刻有源区：光刻有源区：2024/4/23P-well显影显影P-well氮化硅刻蚀去胶氮化硅刻蚀去胶3.场区氧化：场区氧化：P-well场区氧化（湿法氧化）场区氧化（湿法氧化）P-well去除氮化硅薄膜及有源区去除氮化硅薄膜及有源区SiO22024/4/23掩膜掩膜3：光刻多晶硅光刻多晶硅P-well去除氮化硅薄膜及有源区去除氮化硅薄膜及有源区SiO2P-wellP+N+N+P+N-SiP-well栅极氧化膜栅极氧化膜多晶硅栅极多晶硅栅极 生长栅极氧化膜生长栅极氧化膜 淀积多晶硅淀积多晶硅 光刻多晶硅光刻多晶硅2024/4/23P-well生长栅极氧化膜生长栅极氧化膜P-well淀积多晶硅淀积多晶硅P-well涂胶光刻涂胶光刻多晶硅光刻板多晶硅光刻板P-well多晶硅刻蚀多晶硅刻蚀2024/4/23掩膜4 ：P+区光刻区光刻 1、P+区光刻区光刻 2、离子注入、离子注入B+，栅区有多晶硅做掩蔽，栅区有多晶硅做掩蔽，称为硅栅自对准工艺。称为硅栅自对准工艺。3、去胶、去胶P-wellP+N+N+P+N-SiP-wellP-wellP+P+2024/4/23P-wellP+P-wellP+P+硼离子注入硼离子注入去胶去胶2024/4/23掩膜5 ：N+区光刻区光刻 1、N+区光刻区光刻 2、离子注入、离子注入P+，栅区有多晶硅做掩蔽，栅区有多晶硅做掩蔽，称为硅栅自对准工艺。称为硅栅自对准工艺。3、去胶、去胶P-wellP+N+N+P+N-SiP-wellP-wellP+P+N+N+2024/4/23P-wellN+P-wellP+P+磷离子注入磷离子注入去胶去胶P+P+N+N+2024/4/23掩膜6 ：光刻接触孔：光刻接触孔1、淀积、淀积PSG.2、光刻接触孔、光刻接触孔3、刻蚀接触孔、刻蚀接触孔P-wellP+N+N+P+N-SiP-wellP-wellP+P+N+N+磷硅玻璃（磷硅玻璃（PSG)2024/4/23掩膜6 ：光刻接触孔：光刻接触孔P-wellP+P+N+N+淀积PSGP-wellP+P+N+N+光刻接触孔P-wellP+P+N+N+刻蚀接触孔P-wellP+P+N+N+去胶2024/4/232024/4/23掩膜7 ：光刻铝线：光刻铝线1、淀积铝、淀积铝.2、光刻铝、光刻铝3、去胶、去胶P-wellP-wellP+P+N+N+2024/4/23P-wellP+P+N+N+铝线铝线PSG场氧场氧栅极氧化膜栅极氧化膜P+区区P-wellN-型硅极板型硅极板多晶硅多晶硅N+区区2024/4/23Example:Intel 0.25 micron Process5 metal layersTi/Al-Cu/Ti/TiNPolysilicon dielectric2024/4/23Interconnect Impact on Chip2024/4/23掩膜8：刻钝化孔：刻钝化孔CircuitPADCHIP双阱标准CMOS工艺P+p-epip welln wellp+n+gate oxideAl(Cu)tungstenSiO2SiO2TiSi2field oxide增加器件密度增加器件密度防止寄生晶体管效应（闩锁效应）防止寄生晶体管效应（闩锁效应）p-epiP阱阱n+STITiSi2STI深亚微米深亚微米CMOS晶体管结构晶体管结构STISTISTIN阱阱n-n+n-p+p-p+p-源/漏扩展区浅槽隔离侧墙多晶硅硅化物2024/4/23作业：作业：1.课本P14，1.2题2.下图是NMOS晶体管的立体结构图，请 标出各区域名称及掺杂类型，并画出这个器件的版图（包括接触孔和金属线）。3.名词解释：MOS NMOS PMOS CMOS 场氧、有源区、硅栅自对准工艺