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单击此处编辑母版标题样式,单击此处编辑母版文本样式,第二级,第三级,第四级,第五级,#,CMOS工艺技术,CMOS工艺流程,CSMC-HJ,Wafer Fabrication,Process,Technology,CMOS,CMOS,Starting with a silicon wafer,Cross Section of the Silicon Wafer,Magnifying the Cross Section,CMOS,n/p-well Formation,Grow Thin Oxide,Deposit Nitride,Deposit Resist,silicon substrate,UV Exposure,Develop Resist,Etch Nitride,n-well Implant,Remove Resist,CMOS,n/p-well Formation,silicon substrate,Grow Oxide(n-well),Remove Nitride,p-well Implant,Remove Oxide,Twin-well Drive-in,p-well,n-well,Remove Drive-In Oxide,silicon substrate,p-well,n-well,CMOS,LOCOS Isolation,Grow Thin Oxide,Deposit Nitride,Deposit Resist,UV Exposure,Develop Resist,Etch Nitride,Remove Resist,CMOS,LOCOS Isolation,silicon substrate,p-well,n-well,Deposit Resist,UV Exposure,Develop Resist,Field Implant B,Remove Resist,Grow Field Oxide,Fox,Remove Nitride,Remove Oxide,silicon substrate,p-well,n-well,Grow Screen Oxide,CMOS,Transistor Fabrication,Vt Implant,Deposit Resist,UV Exposure,Develop Resist,Punchthrough Implant,Remove Resist,Remove Oxide,Fox,silicon substrate,p-well,n-well,Grow Gate Oxide,CMOS,Transistor Fabrication,Deposit PolySi,PolySi Implant,polySi,polySi,Deposit Resist,UV Exposure,Develop Resist,Etch PolySi,Remove Resist,Fox,silicon substrate,p-well,n-well,CMOS,Transistor Fabrication,Deposit Thin Oxide,Deposit Resist,UV Exposure,Develop Resist,n-LDD Implant,Remove Resist,Fox,polySi,polySi,silicon substrate,p-well,n-well,CMOS,Transistor Fabrication,Deposit Resist,UV Exposure,Develop Resist,p-LDD Implant,Remove Resist,Deposit Spacer Oxide,Etch Spacer Oxide,Fox,polySi,polySi,silicon substrate,p-well,n-well,CMOS,Transistor Fabrication,Deposit Resist,UV Exposure,Develop Resist,n+S/D Implant,n+,n+,Remove Resist,Fox,polySi,polySi,silicon substrate,p-well,n-well,CMOS,Transistor Fabrication,Deposit Resist,UV Exposure,Develop Resist,p+S/D Implant,p+,p+,Remove Resist,Fox,polySi,polySi,n+,n+,silicon substrate,p-well,n-well,CMOS,Contacts&Interconnects,Deposit BPTEOS,BPTEOS,BPSG Reflow,Planarization Etchback,Deposit Resist,UV Exposure,Develop Resist,Contact Etchback,Remove Resist,Fox,polySi,polySi,n+,n+,p+,p+,silicon substrate,p-well,n-well,CMOS,Contacts&Interconnects,Depost Metal 1,Metal 1,Deposit Resist,UV Exposure,Develop Resist,Etch Metal 1,Remove Resist,Fox,polySi,polySi,p+,p+,n+,n+,BPTEOS,silicon substrate,p-well,n-well,CMOS,Contacts&Interconnects,Deposit IMD 1,IMD1,Deposit SOG,SOG,Planarization Etchback,Deposit Resist,UV Exposure,Develop Resist,Via Etch,Remove Resist,Fox,polySi,polySi,p+,p+,Metal 1,n+,n+,BPTEOS,silicon substrate,p-well,n-well,CMOS,Contacts&Interconnects,Deposit Metal 2,Metal 2,Metal 2,Deposit Resist,UV Exposure,Develop Resist,Etch Metal 2,Remove Resist,Deposit Passivation,Fox,polySi,polySi,p+,p+,Metal 1,n+,n+,BPTEOS,IMD1,SOG,Passivation,感谢阅读本文档，谢谢！,
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