TFT-LCD 基本驅動原理简介

按一下以編輯母片標題樣式,按一下以編輯母片,第二層,第三層,第四層,第五層,*,LCD,基本,驅動原理,課程大綱,顯示的基本原理,1.,偏光片的使用,2. Rubbing,的定向,3.,液晶的定向,4.,加入電場後的液晶,5.,液晶與偏光片的效應組合,LCD,基,本驅動原理,1.,液晶與外加電場的關係,2. STN,的基本驅動,（,a,）,CSTN,的機構,（,b,）,STN,的簡易等效電路,（,c,）,STN,的波形驅動,3. TFT,的基本驅動,（,a,）,TFT,的機構,（,b,）,TFT,的簡易等效電路,（,c,）面板的各種極性與,Common,的不同驅動,（,d,）,Cst on Common & Cst on Gate,LCD,的顯示原理,基本上，,LCD,是藉由電場加於液晶，改變其雙折射現像，並配合偏光片來決定光的路徑。,以顯示出對比，並利用,color filter,來呈現出色彩。,(1).,偏光片的使用 ：,使用偏光片，可決定光的行進路線。,(2).,Rubbing,的定向：,可使液晶分子呈現規則的排列,(3).,液晶的定向,：可使液晶分子呈現規則的排列後，達到扭轉的功,能；不同型態之,LCD,有不同的扭轉角。,(4).,加入電場後的液晶：,當所加的電場強度高於液晶的臨限電壓時，,改變原有的扭轉排列狀態。,(5).,液晶與偏光片的效應組合：,未加電壓,：當光線通過上層偏光片，以一特定的方向進入,LCD,後，藉,由液晶的扭轉將光路徑旋轉至特定之角度，而得以穿透下,層偏光片的透過軸向。,施加電壓,：原有液晶分子排列的狀態經過施加電壓後，已失去了旋轉,光路徑的功能，因此光線無法透過直交的偏光片。,那麽,STN,與,TFT,通過什麽樣的方式外加一個電場，,改變,液晶,原有的扭轉排列狀態。,液晶與,Von,，,Voff,關係：,液晶與外加電場之關係,STN,的基本驅動,Rear Substrate,Color Filter,Resin Black Matrix,Over Coat,Common Electrode,PI,Top Coat,Segment Electrode,Front Substrate,L. C.,Rear Compensation Film,Rear Polarizer,Front Polarizer,Front Compensation Film,Sealing Print,Spacer,Transflective,layer,CSTN Structure,Rr,C,Rc,Ri-r,Ri-r,Ri-r,Rr,1,Rr,Rc,Rc,C,C,Rr,Rr,Rr,Rr,Rr,Rr,Rr,Rr,Rr,C,C,C,Rc,Rc,Rc,Rc,Rc,Rc,Rc,Rc,Rc,C,C,C,Ri-c,Ri-c,Ri-c,STN,簡易等效電路：,多工驅動,B type waveform,Vop,=5V,Bias=1/5,Duty=1/4,STN,舉例分析,那麽怎樣產生這些波形？,幾項定義的解釋,電子回路的產生,若,V1=1V,V2=5V T1=1mS,T2=16mS,T3=32mS,則,1.M,信號週期,=,T,3,=3,2mS2.M,信號頻率,=1/,T,3,=,31.25Hz3.Frame,週期,=,T2=,16mS4.Frame,頻率,=,1/,T2=62.5Hz5.Duty=T1/T2=1ms/16mS =1/166.Bias=V1/V2=1V/5V=1/5,1.M信號週期:使液晶驅動波形變成交流電壓之信號=T32.,Frame,週期,:,從第,1,個,COM,掃到最後,1,個,COM,所用的時間,=T2,3.,Duty:,掃描,1,個,COM,所用的時間,/,Frame=(T1/T2).,4.,Bias:V1/V2,M,Frame,Duty,Bias,定義,:,BIAS=(VCC-V1)/(VCC-V5)或 = R1/(R1+R2+R3+R4+R5)=1/(1+1+5+1+1)=1/9,1. Von,，,Voff,電壓計算：,a.,靜態驅動：,Von(rms,) =,Vop,Voff(rms,) = 0 ,無鬼影,b.,多工驅動：,Vop,Bias,2,+Duty-1,Von(rms,) =,Bias Duty,Vop,(Bias-2),2,+Duty-1,Voff(rms,) =,Bias Duty,c.,最佳,Bias,的選擇：,Bias,數：,Duty,數,+1,例：,1/4 Duty,驅動時，最佳,Bias,：,4 +1=31/3 Bias,(,2,).LCD,驅動波形,Vrms,計算方式,: 1.Vrms,計算方式,:,如左圖所示其電壓每格為,1V,其時間每格為,5,秒,所以其,Vrms,:,B TYPE(VOP:5V,1/5BIAS, 1/8DUTY),2.Von(rms,),計算方式,:,3.Voff(rms),計算方式,:,B TYPE(VOP:5V,1/5BIAS, 1/8DUTY),4.,最佳之,duty,與,bias,之計算方式,:,但是有時爲了降低,Vop,，採用減小,Bias,的方法,如：,HL3307 IC,Duty 1/1 1/128,Bias 1/5 1/14,的選擇,TFT,基本驅動,Clc,TFT Substrate,Color Filter Substrate,R,G,B,Clc,Clc,R,B,G,TFT,基本的剖面圖,舉例：,TFT LCD,等效電路,Gate Drivers,Source Driver,1,H,1H,Clc,Cs,Cs,Cs,Cs,Cs,Cs,Cs,Cs,Cs,Clc,Clc,Clc,Clc,Clc,Clc,Clc,Clc,Glass,Glass,Gate Metal Deposition,Gate Patterning,SiNx,Deposition,i a-,Si,Deposition,n+ a-,Si,Deposition,Active Patterning,Data Metal Deposition,Data Metal Patterning,n+ a-,Si,Etch,SiNx,Deposition,Via Hole Patterning,ITO Deposition,Pixel Patterning,Pixel,Data,Passivation,SiNx,n+ a-,Si,i a-,Si,Gate,insulator,SiNx,Gate,Via hole,Frame Time,Gate,1,2,3,N,1H,L1,L2,L3,DATA,TFT Timing chart,t,F,= 16.7ms,t,g,(gate on time),G0,G1,G2,G3,+,V1,+V2,V3,off,off,off,on,on,on,off,off,off,off,off,off,Cst,Scanning at-a-line,-,Vgh,is applied to a gate line,- All,TFTs,on a gate line are turned on,- Current flows from data line to pixel and pixels on,the gate line are charged up to data voltage,-,Vgl,is applied to a gate line,- All,TFTs,on a gate line are turned off and pixels on,the gate line holds the charged voltage,TFT driving principle,Display Format,Resolution,VGA,SVGA,XGA,SXGA,UXGA,QXGA,Gate-on-time,480x640xRGB,600x800xRGB,768x1024xRGB,1024x1280xRGB,1200x1600xRGB,1536x2048xRGB,34,s,27,s,21.7,s,16,s,13,s,10,s,Pixel Size (in 15.1”),480,m X 160m,384,m X 128m,300,m X 100m,234,m X 78m,192,m X 64m,150,m X 50m,Refreshing time,t,F,( Frame time ) ( dominated by the Pixel design ,t,g,),Refreshing rate = 1/,t,F,Gate switching time,t,g,( Gate-on time ),t,g,( Gate-on time ),=,t,F,( Frame time ) /,total Gate line ( dominated by product resolution),For example:,t,g,( Gate-on time ) = 16.7 ms /,768,( for 14.1” XGA ) =,21.7,s,TFT resolution,R/G/B:,若,各以,6 bits,訊號控制,則可各得,2,6,=64 scales,1 dot: R/G/B,所組成所以螢幕上一個點由,6X3=18 bits,所控制,故每個點顏色階數可有,2,18,=256K scales,Full color (True color) scale: 24 bits= 17M scales,1M=1024K, 1K=1024bits,Color scale Depends on,The charging capability,T-V (Transmission versus Voltage) curve,TN liquid crystal: Normally White,TFT mobility (,ie,carrier mobility,載子移動率,),Transmission (%),Voltage,像素,Pixel dimension: 88X264 mm,2,點距,Dot dimension: 264X264 mm,2,TFT resolution,Dot,Inversion,Gate,Inversion,Data,Inversion,Common,Inversion,面板的各種極性變化方式：,Column inversion,Line inversion,Dot inversion,Frame inversion,1st field,2nd field,Positive voltage,Negative voltage,Checkerboard Pattern,2,4,6,8,10,12,14,16,Gate_Even,Gate_Odd,Data_Even,Data_Odd,Spare,Vgh,= +15V,Vgl,= -15V,tg,= 100s,Vdh,= +5V,Vref,= 0V,Vdl,= -5V,Vgh,Vgl,Vdh,Vdl,Vref,Dot Inversion Pattern,2,4,6,8,10,12,14,16,Gate_Even,Gate_Odd,Data_Even,Data_Odd,Spare,Vgh,= +15V,Vgl,= -15V,tg,= 100s,Vdh,= +5V,Vref,= 0V,Vdl,= -5V,Vgh,Vgl,Vdh,Vdl,Vref,Gate Inversion Pattern,2,4,6,8,10,12,14,16,Gate_Even,Gate_Odd,Data_Even,Data_Odd,Spare,Vgh,= +15V,Vgl,= -15V,tg,= 100s,Vdh,= +5V,Vref,= 0V,Vdl,= -5V,Vgh,Vgl,Vdh,Vdl,Vref,Data Inversion Pattern,2,4,6,8,10,12,14,16,Gate_Even,Gate_Odd,Data_Even,Data_Odd,Spare,Vgh,= +15V,Vgl,= -15V,tg,= 100s,Vdh,= +5V,Vref,= 0V,Vdl,= -5V,Vgh,Vgl,Vdh,Vref,Common Driving Pattern,Common,電極的驅動方式,Common,電壓固定不變的驅動方式,Common,電壓不停變動的驅動方式,Direct Driving of TFT,LCDs,DC Bias,of Common,GrayScale,Voltage,V0,V1,V2,V62,V63,V63,V62,V2,V1,V0,1 Frame / 1 Line,AC,Driving of TFT,LCDs,V0,V1,V2,V62,V63,V63,V62,V2,V1,V0,Common Waveform,Graylevel,Voltage,1Frame / 1 Line,T,100%,V,Vth,Vth,:,液晶的操作臨界電壓,Vcom,:,共通電極訊號位準,正極性,訊號時,光電轉移曲線,負極性,訊號時,光電轉移曲線,Vth,負極性,時,臨界電壓,正極性,時,臨界電壓,5V,3.5V,6.5V,TFT driving curve,T,100%,V,5V,-1.5V,Vth,正極性,訊號時,共通電極訊號位準,負極性,訊號時,共通電極訊號位準,正極性,訊號時,光電轉移曲線,負極性,訊號時,光電轉移曲線,Vth,TFT driving curve,面板極性變化與,Common,電極驅動方式的選用,面板極性變化方式,可使用的,Common,電極驅動方式,Common inversion,固定與變動,Gate inversion,固定與變動,Data inversion,只能使用固定的,Common,電極電壓,Dot inversion,只能使用固定的,Common,電極電壓,面板極性變化與,Common,電極驅動方式的選用,面板極性變化方式,Flick,的現象,Crosstalk,的現象,Common inversion,明顯,垂直與水平方向都容易發生,Gate inversion,不明顯,水平方向容易發生,Data inversion,不明顯,垂直方向容易發生,Dot inversion,幾乎沒有,不易發生,在面板設計上,Cst,有兩种擺放位置,1.,Cst,on Common,2. Cst on Gate,液晶畫素,TFT,Gate Line,Data Line,Cs,液晶畫素,TFT,Common,Gate Line,Data Line,Cs,Cs,Cst on Com,Cst on Gate,Higher Open Ratio,Cst Design (Cst on Com & Cst on Gate),TFT,Cst,Gate-line,Data-line,Via,ITO,Pixel Layout (Cst on Com & Cst on Gate),Cst on Gate / Com,之名稱來自於,Cst,所接的信號來源,依構成電容之層別種類可細分成,MII & MIM,電容設計差異,-MIM vs. MII,MIM,Cross-View,MII,Cross-View,名詞解釋,:,M metal,金屬,GE / SD / ITO,I Insulator,絕緣層,AS / BP,用來使上述金屬層間之分隔避免之間,Short,Cst on Gate,即使用,ITO/GE,作電容儲存,Pixel,主要組成要素,畫面上一個點為三個,pixel,所組成,( R,紅,G,綠,B,藍,),而每個,pixel,之組成要素則為,1.TFT device,主要作用為控制,pixel,信號之傳遞,2. Cst,主要功用為儲存電荷之用,確保在下一次更新,信號來臨前可將先前之信號儲存於,pixel,內,3. ITO,與彩色濾光片共同組成上下兩電極板提供電場使兩者之間之,液晶角度變化以控制,pixel,之亮暗程度,TFT Configuration,Cst on Gate,MIM,Cst on Com,MIM,名詞解釋,GE :,1.,掃描線,( Scan line ),決定畫面更新,可控制,AS,層開關之開啟或關閉,2.,作外圍金屬線路之用,避雷針,.,AS :,1.Pixel,之開關,決定,SD,訊號輸入,pixel,裡,來決定,pixel,之亮暗程度,2.Dummy pattern,mark,numbers,.not for circuit layout.,3.,絕緣層,i.e.Repair Line cross-over pads.,SD :,1.,信號線,( Data line ),決定每個,pixel,需要到達之電壓值決定其亮度,2.,作外圍金屬線路之用,避雷針,.,BP :,1.,電路橋接點,將金屬層藉由,BP,挖,Via,洞將,各層金屬連接,以構成所想要之電路,2.,絕緣層,Dummy pattern,mark,numbers,.not for circuit layout.,ITO :,1.Pixel,之電極板,可用來控制液晶,以決定,pixel,透光程度,2.,作外圍金屬線路串接用,因厚度較薄,通常用來作測試信號間之串接,於後段較易切斷,避免因,cut,線造成過多金屬屑影響電路,Cst on Common & Gate,在驅動電路上的差異,Clc,Cs,Clc,Cs,Common,Common,(N-1)th,Scan Line,(N-1)th,Scan Line,Nth Scan,Line,Nth Scan,Line,Cs on Common Mode,Cs on Gate Mode,Cgd,Cgd,液晶,电,容,儲存,电,容,扫,描,电极,资,料,电极,共通,电,極,Mth,Data Line,Mth,Data Line,资,料,电极,扫,描,电极,:,Clc,:Cs,:,Com,:,Cgd,寄生,电,容,液晶,画,素,电,容,:,Clc+Cs,Cst on Common & Gate,的簡單電路,TFT LCD,驱动,波形,(Cs on Common, Common = DC Bias),1),TFT,LCDs,Driving Waveform,-,Cs on Common,2),TFT,LCDs,Driving Waveform,-,Cs on,Gate,Cst on Common & Gate,在光學上的差異,Cst on Gate,MIM,Cst on Com,MIM,由上圖看出其中的開口率不一樣！,Cst on gate Cst on Common,Result:,1.,設計上的差異,2.,電路驅動的差異性,3.,光學上開口率不一樣,但是爲什麽大多數的存儲電容設計都是採用,Cst on gate,的方式：,1.,Cst,on gate,的開口率,Cst,on Common,開口率,2.,雖然黨下一條,Gate,走綫送出電壓打開下一個,TFT,時會影響到存儲電容上存儲電壓的大小，但是下一條,Gate,走綫打開到關閉的時間很短，如： 則很有限！,Thanks !,