Teradyne GenRad Training Material

,单击此处编辑母版标题样式,单击此处编辑母版文本样式,第二级,第三级,第四级,第五级,*,*,GenRad Basic knowledge,GenRad,基础培训,Contents,目录,Hardware Part,Software Part,In Circuit Test Elements,Test Program Development Process,2024/9/17,Part I,硬件部分,Hardware,2024/9/17,GenRad Frontispiece,正视图,Monitor,显示器,Printer,打印机,Keyboard,键盘,Scanner,扫描仪,Emergency Off,紧急按钮,Pin Cage,测试卡槽,Mouse,鼠标,PC,电脑主机,Power,电源,Operation Keypad,操作键盘,Control Panel,控制面板,Receiver,测试针床,2024/9/17,Control panel,控制面板,1,2,3,4,5,1) Testhead Switch : On means open ; CPU means close .,上电开关 ：,On,是打开电源，,CPU,是关闭电源。,2,）,Fixture Vacuum : On means Change Fixture ; Auto means Self-Test Model ; Off means lock Fixture .,夹具控制开关 ：,On,是更换夹具状态；,Auto,是夹具自检模式状态；,Off,是用来锁夹具并进入备测状态。,3) UUT Vacuum : On means Release the Vacuum ; Auto means Test Model ; Off means Connect the Vacuum .,真空控制开关,: On,是释放真空使其无法测试，,Auto,是正常的测试状态，,Off,是真空吸和使其无法打开夹具,.,4) Choose Test Vacuum : There are two test vacuum , turn to “single”, using one of them , turn to “Double”, using the two .,选择测试真空,:,共有两个测试真空,打到,single,上使用的是其中的一个,打到,double,上是两个同时使用。,5) Wrist Strap,手腕带插孔,2024/9/17,Tester Power Switch,机器总电源开关,Main Power,总电源,2024/9/17,Tester Inside I,内部结构,1,Power & PC,电源与电脑主机,UUT,电源,输入输出板,前,后,电脑主机,程序电源,1,程序电源,2,交流电源,扫描仪电源,电源控制器,RS-232,分配盒,2024/9/17,Tester Inside II,内部结构,2,GR228X Pin Cage,测试卡槽,RECEIVER,User Power,Supplies,(optional),PC,IEEE-488,Interface,MXIbus,MTG,RTC,CST,Reference,Pin Bd #1,Pin Bd #2,Optional Pin Bd/DSM,Optional Pin Bd/DSM,CFB,DSM,AFTM,ICA,. . .,0,1,2,3,4,5,6,7,12,13,14,15,MTG,2024/9/17,MTG,MXI to GenRad Board,电源控制卡,Functional blocks are MIX to GR bus interface, low speed controller, data expander,2024/9/17,RTC,Run Time Controller,时钟控制卡,BUS interface for the analog subsystem directs data transfers between CPU and digital subsystem,2024/9/17,Reference,Driver/Sensor reference,Supplies programmed DC reference voltages for the D/S pin boards,2024/9/17,CST,Clock/Sync/Trigger board,Provides event timing and event detection,2024/9/17,CFB,Custom Function Board,客户功能测试卡,2024/9/17,DSM,Deep Serial Memory,2024/9/17,AFTM,Analog Functional Test Module,16 Bit DC Voltmeter,True RMS AC Voltmeter,AC/DC Source,Frequency Time Interval Meter,High Frequency Scanner (100 MHz),TTL Signal Output,2024/9/17,ICA,In-Circuit Analog Module,Instrumentation on 1 Circuit Card,Measures Shorts, Opens and Component Values,Analog Component Groups,IC Groups,Hybrid Component Groups,2024/9/17,Part II,Software,软件部分,2024/9/17,Login Test program,登陆测试程序,登陆计算机,选择测试程序,选择测试路径,2024/9/17,Diagnose Mode,诊断模式,选择测试或修改模式,键入测试文件名,运行程序,2024/9/17,Self-Test Mode,自检模式,2024/9/17,TEST Mode,测试模式,2024/9/17,Translate Mode,转换模式,2024/9/17,Debug MODE,调试模式,2024/9/17,Part III,在线测试原理,In Circuit Test Elements,2024/9/17,Analog Resistor Testing,模拟电阻测试法,2024/9/17,4-Terminal Guarded Resistor Test,4,线电阻测试法,SET MUX AT (CHA=DCMVHI,DCSVHI: CHB=DCMIIM: CHC=DCMVLO,DCMGRDSNS:CHD=REFCONN:,REF=DCSVLO,DCSVLOSNS,DCSILO,ANAGND);,2024/9/17,Kelvin Resistor Test,凯尔文电阻测试法,SET MUX AT (CHA=DCSVHI:CHB=DCMVHI,DCSVHISNS:CHC=DCMGRDSNS:CHE:=DMIIN:CHF=DCMVLO,DCSVLOSNS,DCMISNS:,CHG=REFCONN: REF=DCSVLO,DCMGRDSNS,ANAGND);,SET SCAN AT (1:20:0: :9:29:GND=0);,2024/9/17,6-Terminal Resistor Test,6,线电阻测试法,SET6TR: SET MUX AT (CHA=DCSVHI: CHB=DCMIIN: CHC=REFCONN: CHE=DCSVHISNS: CHF=DCMISNS: CHG=DCSVLOSNS,DCMGRDSNS: REF=DCSVLO,ANAGND);,2024/9/17,Capacitor Test,电容测试法,SET MUX AT (CHA=ACZVSRC: CHB=ACZIMEAS:CHC=ACZGRDSNS: CHD=REFCONN:REF=ACZGND,ACZGND2,ACZGND3,ANAGND);,2024/9/17,4-wire Guarded Inductor Test,4,线电感测试法,SET MUX AT (CHA=ACZVSRC:CHB=ACZIMEAS:CHC=ACZGRDSNS: CHD=REFCONN:REF=ACZGND,ANAGND);,2024/9/17,Diode Test,二极管测试法,SET MUX AT (CHA=DCSIOUT,DCMVHI:CHB=DCMVLO:CHC=DCMGRDSNS: CHD=REFCONN:REF=DCSILO,ANAGND);,2024/9/17,Zener Diode Test,稳压二极管测试法,SET MUX AT ( CHA=DCSVHI : CHB=DCMVHI : CHC=REFCONN :,CHD = DCMVLO : REF = DCSVLO, DCSVLOSNS, ANAGND );,2024/9/17,Transistor Test,三极管测试法,SET MUX AT(CHA=DCSVHI:CHB=DCMVHI,DCMIIN:CHC=DCMVLO,DCSIOUT: CHD=REFCONN:REF=DCSVLO,DCSVLOSNS,DCSILO,DCMGRDSNS,ANAGND);,SET SCAN AT(CHA=0:CHB=BASE:CHC=EMITTER:CHD=COLLECTOR,GUARDS);,2024/9/17,Digital Testing,数字测试法,U1_B1: BURST;IC(17,18) OS(38) IH(17) IL(18) OH(38);IH(18) OL(38);IL(17) OH(38);IL(18); ID(17,18) OI(38);END BURST;,2024/9/17,Digital Subsystem,数字测试子系统,Devices used in the subsystem,MTG board,High Speed (HS) controller board,Clock/sync/trigger (CST) board,Pin boards,Driver/sensor (D/S) reference board,Optional devices,Deep Serial Memory (DSM),Analog Functional Test Module (AFTM),Custom Function Board (CFB),2024/9/17,Part IV,Test Program Development Process,测试程序,发展流程,2024/9/17,Step 1,A,# ATG STEP,Circuit prepare =YES,IDD prepare=YES,Cross reference=YES,ANA=NO,DIG=NO,MER=NO,Nail State=temp,.ACL,.DTL,.CKT,.WOR,.DTL,.WOR,.WOR,.ERR,.IDX,.ERP,.AXR,#PRINT.AXR,Evaluate.AXR,Any,Errors,?,Power Editor,Retune to CKTGEN and Revise mode repair all errors,.IDX,.CPD,.TDL,.ATX,.ATO,.PTP,.FWI,2024/9/17,Step 2,B,#,ATG STEP 2,ANA=YES,DIG=YES,MER=YES,NAIL=Temp,ATX=Y,PTP=Y,.ATX,.WOR,.ATL,.ATX,.DTL,.ATP,.DTP,.ATP,.RPT,.DTP,.MSG,.TPX,2024/9/17,Step 3,#Nail Assign,Mode=New,Update=YES,Low Nail=,High Nail=,TPX in=Y,IDX in=Y,CKT in=Y,ATX in=Y,NDB =N,#PRINT or TYPE,IN=.RDT .MSG,.NFR .NAR,C,.TPX,.IDX,.CKT,.ATX,.TPG,.IDD,.CKT,.NFR,.NAR,.NDB,2024/9/17,Step 4,#Translate,TPG=,OBC=,SMT=,LIS =,Support Target (ICA),.TPG,.OBC,.SMT,.LIS,D,Build fixture,Debug Program,2024/9/17,The End,Thanks !,2024/9/17,