资源描述
,Click to edit Master title style,Click to edit Master text styles,Second level,Third level,Fourth level,Fifth level,*,Customizable Embedded System Architectures,Peter Petrov and Alex Orailoglu,University of California,San Diego,Embedded Processors Market,Embedded processors occupy,more than 90%,of the entire processor market,A large number of electronic products require high-end 32/64-bits embedded processors,Embedded Processors Market,Embedded processors occupy,more than 90%,of the entire processor market,A large number of electronic products require high-end 32/64-bits embedded processors,Cell phones,DSP computation,Speech,codecs,Wireless protocols,Automotive,Engine control,Automatic transmission,ABS,GPS,Multimedia,DVD/MP3/CD,Video games,Digital cameras,Application Requirements,Design cost,Time-to-market,Flexibility,General embedded processor architectures introduced to satisfy these constraints!,Application Requirements,Design cost,Time-to-market,Flexibility,General embedded processor architectures introduced to satisfy these constraints!,Deterministic Performance,Power consumption,Performance,Processor architecture,New Architectural Paradigm,FPGA,ASIC,P,Design cost,Time-to-marketFlexibilityDeterminism,PowerPerformance,Design costTime-to-marketFlexibility,DeterminismPowerPerformance,Design costTime-to-marketFlexibility,DeterminismPowerPerformance,New Architectural Paradigm,FPGA,ASIC,P,DeterminismPowerPerformance,Design costTime-to-marketFlexibility,ASCP,Application-Specific Customizable Embedded Processor,Helps preserve the benefits of generality,Alleviates the drawbacks of general-purpose processors,Static vs.Dynamic Optimizations in General Purpose Processors,Application,ApplicationInformation,ISA,Micro-Architecture,Hardware for dynamic resolution,Strengths,:,Execution information available,Optimizes instruction instances,Limited processing power,Run-time“training”requires storage,Limited application knowledge,Weaknesses,:,Global program information available,“Unlimited”processing power available,Strengths,:,ISA used for information transfer,No run-time information,Weaknesses,:,CompilerOptimizations,ArchitecturalOptimizations,Dynamically Customizable Embedded Processors,Compilers for static extraction,Architectural Runtime incorporation,ASCL“shapes the processor by matching compiler information to microarchitecture,ASCL,Micro-Architecture,Application,ISA,Execution Resources,ASCL Application Specific Customization Logic,Provides deterministic information about application regularities,Restricts the domain of possible application behaviors,Hardware for dynamic resolution,Microarchitectural Customizations,Use of application knowledge in microarchitectural modules,Power,Performance,Determinism,Reprogrammable customization hardware,Post-manufacturingre-customizations,Large manufacturing volumes,Application,Program,RAM,FU1,FU2,Microarchitecture,P,Information Transfer and Hardware Support,Loop A,Loop B,Loop C,Application,App Information,ASCL,Application-Specific,P,Special registers or tables,Application hot spots targeted,Application information loaded into special hardware tables/registers,providing,reprogrammable,implementation,Information transfer either,by software,or,system setup,Unified Customizable Architecture,ALU,Reg,File,FU1,FU2,ASBR,ACBTB,Decode,Data Cache,Partitioned/Compressed Tags,Low-Power,Instr.Transform,I-Mem,Data Memory,A unified,dynamically customizable embedded processor architecture,TLB,Application,Micro-Architecture,ISA,Statistically based methods normally used to infer application properties,Power expensive microarchitectural components,Highly sub-optimal performance,Unpredictable execution time,FU1,FU2,CachesBranch Pred.,etc,.,Application Knowledge Benefits:,Precise application knowledge,Application,Micro-Architecture,ISA,Statistically based methods normally used to infer application properties,Precise,application knowledge used instead through the ASCL,Application regularities readily available for utilization=Scaled down and power efficient,uArchitectural,components,Deterministic execution time achieved,FU1,FU2,CachesBranch Pred.,etc,.,ASCL,Application Knowledge Benefits:,Precise application knowledge,Application Knowledge Benefits:,Refined program behavior,FU1,FU2,Worst case assumption for the program execution,ISA,Micro-Architecture,A large set of potential programs!,Worst case execution scenario assumed in general purpose processor,P1,P2,P3,P5,P4,P1,P2,P3,P1,P2,P3,FU1,FU2,Considering a single program segment only!,ISA,Worst case execution scenario assumed in general purpose processors,Application knowledge,refines,the domain of all possible states,Redundant hardware activities removed=Power savings,ASCL,A large set of potential programs!,P1,P2,P3,P5,P4,Application Knowledge Benefits:,Refined program behavior,Micro-Architecture,Conclusions,A customizable processor architecture defined,In-field,recustomization,High volumes due to fixed-silicon architecture,A unified architecture fo
展开阅读全文