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单击此处编辑母版标题样式,单击此处编辑母版文本样式,第二级,第三级,第四级,第五级,2020-10-17,电子技术专业英语教程,#,Unit7 Digital Logic Circuit,2024/10/1,1,电子技术专业英语教程,Lesson 20 Flip-Flop,Backgrounds,Text tour,Language in use,Vocabulary,Structure,Reading/writing techniques,2024/10/1,2,电子技术专业英语教程,Terminology,multivibrator,n.【计】多谐振荡器,field effect transistor,【,计,】,场效应晶体管,shift register,移位寄存器,Backgrounds,2024/10/1,3,电子技术专业英语教程,Text tour,Outline,Flip-flop,Flip-flops invention,Simple flip-flops,Clocked flip-flops,The type of flip-flops,Setreset flip-flops(SR flip-flops),Trigger flip-flops(T flip-flops),JK flip-flop,D flip-flop,2024/10/1,4,电子技术专业英语教程,Flip-flop,In digital circuits,a,flip-flop,is a term referring to an electronic circuit(a bistable multivibrator)that has two stable states and thereby is capable of serving as one bit of memory.,Today,the term flip-flop has come to mostly denote non-transparent(clocked or edge-triggered)devices,while the simpler transparent ones are often referred to as latches;however,as this distinction is quite new,the two words are sometimes used interchangeably.,A flip-flop is usually controlled by one or two control signals and/or a gate or clock signal.The output often includes the complement as well as the normal output.As flip-flops are implemented electronically,they require power and ground connections.,2024/10/1,5,电子技术专业英语教程,Flip-flops invention,The first electronic flip-flop was invented in 1918 by William Eccles and F.W.Jordan.,It was initially called the Eccles-Jordan trigger circuit and consisted of two active elements.,The name flip-flop was later derived from the sound produced on a speaker connected to one of the back coupled amplifiers outputs during the trigger process within the circuit.,This original electronic flip-flopa simple two-input bistable circuit without any dedicated clock signal was transparent,and thus a device that would be labeled as a latch in many circles today.,2024/10/1,6,电子技术专业英语教程,Simple flip-flops,Simple flip-flops,can be built around a pair of cross-coupled inverting elements:vacuum tubes,bipolar transistors,field effect transistors,inverters,and inverting logic gates have all been used in practical circuits-perhaps augmented by some gating mechanism.,The more advanced clocked devices are specially designed for synchronous systems;such devices therefore ignore its inputs except at the transition of a dedicated clock signal.,This causes the flip-flop to either change or retain its output signal based upon the values of the input signals at the transition.,Some flip-flops change output on the rising edge of the clock,others on the falling edge.,2024/10/1,7,电子技术专业英语教程,Clocked flip-flops,Clocked flip-flops,are typically implemented as master-slave devices where two basic flip-flops(plus some additional logic)collaborate to make it insensitive to spikes and noise between the short clock transitions;they nevertheless also often include asynchronous clear or set inputs which may be used to change the current output independent of the clock.,2024/10/1,8,电子技术专业英语教程,The type of,flip-flops,Flip-flops can be further divided into types that have found common applicability in both asynchronous and clocked sequential systems:the,SR(set-reset),D(data or delay),T(trigger),and,JK,types are the common ones;all of which may be synthesized from other types by a few logic gates.,The behavior of a particular type can be described by what is termed the characteristic equation,which derives the next(i.e.,after the next clock pulse)output,Q,next,in terms of the input signal(s)and/or the current output,Q,.,2024/10/1,9,电子技术专业英语教程,Setreset flip-flops(SR flip-flops),The fundamental latch is the simple SR flip-flop,where S and R stand for set and reset respectively.,It can be constructed from a pair of cross-coupled NAND or NOR logic gates.The stored bit is present on the output marked Q.,SR Flip-Flop operation,Characteristic table,Excitation table,S,R,Action,Q,(,t,),Q,(,t,+1),S,R,Action,0,0,Keep state,0,0,0,x,No change,0,1,Q,=0,0,1,1,0,Set,1,0,Q,=1,1,0,0,1,Reset,1,1,Unstable,combination,1,1,x,0,No change,2024/10/1,10,电子技术专业英语教程,Setreset flip-flops(SR flip-flops),Normally,in storage mode,the S and R inputs are both low,and feedback maintains the,Q,and outputs in a constant state,with the complement of,Q,.,If S is pulsed high while R is held low,then the,Q,output is forced high,and stays high even after S returns low;similarly,if R is pulsed high while S is held low,then the,Q,output is forced low,and stays low even after R returns low.,Figure 20-1 shows the symbol for a SR latch.,Figure 20-1 The symbol for a SR latch,2024/10/1,11,电子技术专业英语教程,Trigger flip-flops(T flip-flops),If the T input is high,the T flip-flop changes state(toggles)whenever the clock input is strobed.If the T input is low,the flip-flop holds the previous value.This behavior is described by the characteristic equation:,(or,without benefit of the XOR operator,the equivalent:),and can be described in a truth table:,T Flip-Flop operation,Characteristic tabl
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