lm230wf8t2z2_lcm cas_general_ver0.3_110919

?,Product Specification,LM230WF8,Liquid Crystal Display,Ver. 0.3,?/?,Sep.,19, 2011,33,/ 33,SPECIFICATION,FOR,APPROVAL,Title,2,3,.,0,” FHD TFT LCD,*When you obtain standard approval,please use the above model name without suffix,BUYER,General,MODEL,SUPPLIER,L&T Display Technology (Fujian) Limited.,*MODEL,LM230WF8,SUFFIX,T2Z2,SIGNATURE,DATE,/,Please return 1 copy for your confirmation,With your signature and comments.,/,/,R&D LCM Dept.,L&T Display Technology (Fujian) Limited.,APPROVED BY,DATE,REVIEWED BY,H.J. CHO / Manager ME,K.H. HWANG / Manager EE,J.D. Park / Director,Kent.Zhuang / Manager PM,() Preliminary Specification,( ) Final Specification,Contents,No,ITEM,Page,COVER,1,CONTENTS,2,RECORD OF REVISIONS,3,1,GENERAL DESCRIPTION,4,2,ABSOLUTE MAXIMUM RATINGS,5,3,ELECTRICAL SPECIFICATIONS,6,1),ELECTRICAL CHARACTERISTICS,6,2),INTERFACE CONNECTIONS,8,3),LVDS characteristics,11,4),SIGNAL TIMING SPECIFICATIONS,14,5),SIGNAL TIMING WAVEFORMS,15,6),COLOR INPUT DATA REFERNECE,16,7),POWER SEQUENCE,17,8),POWER DIP CONDITION,18,4,OPTICAL SPECIFICATIONS,19,1),2D OPTICAL SPECIFICATIONS,19,2),3D OPTICAL SPECIFICATIONS,25,5,MECHANICAL CHARACTERISTICS,29,6,INTERNATIONAL STANDARDS,31,1),SAFETY,31,2),EMC,31,3,),Environment,31,7,Precautions,32,Record of revisions,Revision No,Description,Date,Page,Ver 0.1,Ver 0.2,Ver 0.3,Preliminary Specifications,Add spec (3D Viewing Angle ) and correct typing error,Update Max Vertical period total (11601220),Update International Standards / Safety,Aug.,02,2011,Aug.,12,2011,Sep.,19,2011,-,4,14,31,1. General description,General features,Outline Dimension,529.7(527.8),(H) x,312.25(310.1),(V) x,12.9,(D) mm(Typ.),Active screen size,23 inches(58.42cm) diagonal,Pixel Pitch,0.0883*RGB(H)mm x 0.265(V)mm,Pixel Format,1920 horiz. By 1080 vert. Pixels RGB stripes arrangement,Color depth,16.7M colors,Luminance, white,250 cd/m2 ( Center 1Point, typ),Power Consumption,Weight,TBD,g (Typ.),Display operating mode,Transmissive mode, Normally White,Surface treatments,Hard coating (3H), Anti-glare treatment of the front polarizer,Interface,LVDS 2Port,Viewing Angle (CR10),R/L 170(Typ.), U/D 160(Typ.),Total 21.45 W(Typ.), (6.65 WV,LCD, 14.8 WW/O Driver),FIG. 1 Block diagram,LM230WF8-T2Z2 is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in the normally white mode. It has a 23.0 inch diagonally measured active display area with Full HD resolution (,1080 vertical by 1920 horizontal pixel array,) Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is determined with,a 8-bit gray scale signal for each dot,thus, presenting a palette of more than,16,7M,colors,with Advanced-FRC(Frame Rate Control). It has been designed to apply the interface method that enables low power, high speed, low EMI. FPD Link or compatible must be used as a LVDS(Low Voltage Differential Signaling) chip. It is intended to support applications where thin thickness, wide viewing angle, low power are critical factors and graphic displays are important. In combination with the vertical arrangement of the sub-pixels, the LM230WF8-T2Z2 characteristics provide an excellent flat panel display for office automation products such as monitors.,Color Gamut,72%(Typ.) CIE 1931,CN1,LVDS,pair #1,LVDS,pair #2,Power circuit,block,+5V,V,LCD,Source driver circuit,TFT-LCD Panel,(1920RGB1080 pixels),G1,Timing,controller,RGB,Backlight assembly (Single LED Bar),FB 2ch,S1,S1920,G1080,3D Viewing Angle (3D CT Fclk 65MHz,t,SKEW,600,+ 600,ps,65MHz Fclk 25MHz,LVDS Clock to Clock Skew Margin (Even to Odd),t,SKEW_EO,- 1/7,+ 1/7,T,clk,-,LVDS Data,t,SKEW,LVDS Clock,T,clk,t,SKEW,(,F,clk,=,1,/,T,clk,),1,),85,MHz,Fclk,65,MHz,:,-,400,+,400,2,),65,MHz,Fclk,25,MHz,:,-,600,+,600,LVDS Even Data,LVDS Odd Clock,LVDS Even Clock,t,SKEW,_,EO,T,clk,T,clk,3-3-3. LVDS Data format,OG,0,OR,5,OR,4,OR,3,OR,2,OR,1,OR,0,OB,1,OB,0,OG,5,OG,4,OG,3,OG,2,OG,1,DE,VSYNC,HSYNC,OB,5,OB,4,OB,3,OB,2,X,OB,7,OB,6,OG,7,OG,6,OR,7,OR,6,Current,(,Nth,),Cycle,Previous,(,N,-,1,),th Cycle,Next,(,N,+,1,),th Cycle,RCLK,+,RXinO,0,+/,-,Tclk,*,4,/,7,Tclk,*,3,/,7,Tclk,Tclk,*,1,/,7,MSB,R,7,R,6,R,5,R,4,R,3,R,2,R,1,R,0,LSB,EG,0,ER,5,ER,4,ER,3,ER,2,ER,1,ER,0,EB,1,EB,0,EG,5,EG,4,EG,3,EG,2,EG,1,DE,VSYNC,HSYNC,EB,5,EB,4,EB,3,EB,2,X,EB,7,EB,6,EG,7,EG,6,ER,7,ER,6,*,ODD,=,1,st Pixel,EVEN,=,2,nd Pixel,RXinO,1,+/,-,RXinO,2,+/,-,RXinO,3,+/,-,RXinE,0,+/,-,RXinE,1,+/,-,RXinE,2,+/,-,RXinE,3,+/,-,OR,3,OR,2,OR,1,OR,0,OG,4,OG,3,OG,2,OG,1,OB,5,OB,4,OB,3,OB,2,OG,7,OG,6,OR,7,OR,6,ER,3,ER,2,ER,1,ER,0,EG,4,EG,3,EG,2,EG,1,EB,5,EB,4,EB,3,EB,2,EG,7,EG,6,ER,7,ER,6,OG,0,OR,5,OR,4,OB,1,OB,0,OG,5,DE,VSYNC,HSYNC,X,OB,7,OB,6,EG,0,ER,5,ER,4,EB,1,EB,0,EG,5,DE,VSYNC,HSYNC,X,EB,7,EB,6,Table 6. Required signal assignment for Flat Link(NS:DS90CF383) transmitter,Notes : Refer to LVDS Transmitter Data Sheet for detail descriptions.,Pin #,Require Signal,Pin Name,Pin #,Require Signal,Pin Name,1,Power Supply for TTL Input,VCC,29,Ground pin for TTL,GND,2,TTL Input (R7),D5,30,TTL Input (DE),D26,3,TTL Input (R5),D6,31,TTL Level clock Input,T,X,CLKIN,4,TTL Input (G0),D7,32,Power Down Input,PWR DWN,5,Ground pin for TTL,GND,33,Ground pin for PLL,PLL GND,6,TTL Input (G1),D8,34,Power Supply for PLL,PLL VCC,7,TTL Input (G2),D9,35,Ground pin for PLL,PLL GND,8,TTL Input (G6),D10,36,Ground pin for LVDS,LVDS GND,9,Power Supply for TTL Input,VCC,37,Positive LVDS differential data output 3,TxOUT3,10,TTL Input (G7),D11,38,Negative LVDS differential data output 3,TxOUT3,11,TTL Input (G3),D12,39,Positive LVDS differential clock output,TX CLKOUT,12,TTL Input (G4),D13,40,Negative LVDS differential clock output,TX CLKOUT,13,Ground pin for TTL,GND,41,Positive LVDS differential data output 2,TX OUT2,14,TTL Input (G5),D14,42,Negative LVDS differential data output 2,TX OUT2,15,TTL Input (B0),D15,43,Ground pin for LVDS,LVDS GND,16,TTL Input (B6),D16,44,Power Supply for LVDS,LVDS VCC,17,Power Supply for TTL Input,VCC,45,Positive LVDS differential data output 1,TX OUT1,46,Negative LVDS differential data output 1,TX OUT1,18,TTL Input (B7),D17,47,Positive LVDS differential data output 0,TX OUT0,48,Negative LVDS differential data output 0,TX OUT0,19,TTL Input (B1),D18,20,TTL Input (B2),D19,49,Ground pin for LVDS,LVDS GND,21,Ground pin for TTL Input,GND,22,TTL Input (B3),D20,23,TTL Input (B4),D21,50,TTL Input (R6),D27,51,TTL Input (R0),D0,24,TTL Input (B5),D22,25,TTL Input (RSVD),D23,52,TTL Input (R1),D1,53,Ground pin for TTL,GND,26,Power Supply for TTL Input,VCC,54,TTL Input (R2),D2,55,TTL Input (R3),D3,27,TTL Input (HSYNC),D24,56,TTL Input (R4),D4,28,TTL Input (VSYNC),D25,3-4. Signal timing specifications,This is the signal timing required at the input of the User connector. All of the interface signal timing should be satisfied with the following specifications for its proper operation.,Table 7. Timing table,Note:,1. DE Only mode operation. The input of Hsync & Vsync signal does not,have an effect on LCD normal operation.,2. The performance of the electro-optical characteristics may be influenced by variance of the,vertical refresh rates.,3. Horizontal period should be even.,Parameter,Symbol,Min.,Typ.,Max.,Unit,Notes,D,CLK,Period,t,CLK,11.11,13.89,16.7,ns,Pixel frequency,: Typ.144MHz,Frequency,f,CLK,60,72,90.0,MHz,Horizontal,Horizontal Valid,t,HV,960,960,960,t,CLK,H Period Total,t,HP,1024,1088,1120,Hsync Frequency,f,H,64,66,83,kHz,Vertical,Vertical Valid,t,VV,1080,1080,1080,t,HP,V Period Total,t,VP,1090,1100,1220,For D,CLK,Vsync Frequency,f,V,50,60,75,Hz,DE,(Data Enable),DE Setup Time,t,SI,4,-,-,ns,DE Hold Time,t,HI,4,-,-,Data,Data Setup Time,t,SD,4,-,-,ns,For D,CLK,Data Hold Time,t,HD,4,-,-,3-5. Signal timing waveforms,Dclk,t,CLK,Valid,Invalid,Invalid,DE(Data Enable),Data,t,SI,t,HI,t,SD,t,HD,DE(Data Enable),t,VV,t,VP,DE,DE(Data Enable),t,HP,t,HV,DE,1. D,CLK ,DE, DATA waveforms,2. Horizontal waveform,3. Vertical waveform,Color,Input Color Data,Red,MSB LSB,Green,MSB LSB,Blue,MSB LSB,R7,R6,R5,R4,R3,R2,R1,R0,G7,G6,G5,G4,G3,G2,G1,G0,B7,B6,B5,B4,B3,B2,B1,B0,3-6. Color input data reference,The brightness of each primary color (red,green and blue) is based on the 8bit gray scale data input for the color ; the higher the binary input, the brighter the color. The table below provides a reference for color versus data input.,Table 8. Color data reference,Basic,Color,Red,Green,Blue,Black,Red (255),Green (255),Blue (255),Cyan,Magenta,Yellow,White,0,1,0,0,0,1,1,1,0,1,0,0,0,1,1,1,0,1,0,0,0,1,1,1,0,1,0,0,0,1,1,1,0,1,0,0,0,1,1,1,0,1,0,0,0,1,1,1,0,1,0,0,0,1,1,1,0,1,0,0,0,1,1,1,0,0,1,0,1,0,1,1,0,0,1,0,1,0,1,1,0,0,1,0,1,0,1,1,0,0,1,0,1,0,1,1,0,0,1,0,1,0,1,1,0,0,1,0,1,0,1,1,0,0,1,0,1,0,1,1,0,0,1,0,1,0,1,1,0,0,0,1,1,1,0,1,0,0,0,1,1,1,0,1,0,0,0,1,1,1,0,1,0,0,0,1,1,1,0,1,0,0,0,1,1,1,0,1,0,0,0,1,1,1,0,1,0,0,0,1,1,1,0,1,0,0,0,1,1,1,0,1,Red(000) Dark,Red(001),Red(002),- - - - - - - - -,- - - - - - - - -,Red(253),Red(254),Red(255) Bright,0,0,0,-,-,1,1,1,0,0,0,-,-,1,1,1,0,0,0,-,-,1,1,1,0,0,0,-,-,1,1,1,0,0,0,-,-,1,1,1,0,0,0,-,-,1,1,1,0,0,1,-,-,0,1,1,0,1,0,-,-,1,0,1,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,1,1,1,0,0,0,-,-,1,1,1,0,0,0,-,-,1,1,1,0,0,0,-,-,1,1,1,0,0,0,-,-,1,1,1,0,0,0,-,-,1,1,1,0,0,1,-,-,0,1,1,0,1,0,-,-,1,0,1,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,Green(000) Dark,Green(001),Green(002),- - - - - - - - -,- - - - - - - - -,Green(253),Green(254),Green(255)Bright,Blue(000) Dark,Blue(001),Blue(002),- - - - - - - - -,- - - - - - - - -,Blue(253),Blue(254),Blue(255) Bright,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,0,0,0,0,0,0,-,-,1,1,1,0,0,0,-,-,1,1,1,0,0,0,-,-,1,1,1,0,0,0,-,-,1,1,1,0,0,0,-,-,1,1,1,0,0,0,-,-,1,1,1,0,0,1,-,-,0,1,1,0,1,0,-,-,1,0,1,3-7. Power sequence,Notes :,1. Please avoid floating state of interface signal at invalid period.,2. When the interface signal is invalid, be sure to pull down the power supply for,LCD V,LCD,to 0V.,3. LED B/L power must be turn on after power supply for LCD an interface signal are valid.,4. It must be no valid signal at SCL & SDA line for 500ms, after V,LCD,input to LCD,Table 9. Power sequence,Parameter,Values,Units,Min,Typ,Max,T1,0.5,-,10,ms,T2,0.01,-,50,ms,T3,500,-,-,ms,T4,200,-,-,ms,T5,0.01,-,50,ms,T7,1,-,-,s,Interface Signal (Tx),Power for LED B/L,V,LCD,Power Supply For LCD,10%,90%,90%,10%,T1,T2,T5,T7,T3,T4,Valid data,LED B/L on,0V,OFF,OFF,3-8. V,LCD,Power dip condition,1) Dip condition,3.5V VLCD,4.5V , td20ms,2) VLCD,3.5V,VLCD-dip conditions should also follow the Power On/Off conditions for supply voltage.,4.5V,3.5V,V,LCD,t,d,FIG. 6,Power dip condition,GND(ground),4. Optical specification,Optical characteristics are determined after the unit has been ON for 30 minutes in a dark environment at 25C.,Table 10. Optical characteristics,Ta=25 C, V,LCD,=5.0V, f,V,=60Hz,D,CLK,=72MHz, Is=85mA,Parameter,Symbol,Values,Units,Notes,Min,Typ,Max,Contras