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AgendaIntroduction of SFF-8431SFF-8431 Standard Compliance Test of SFIEye Diagram Test by DSA8200AgendaIntroduction of SFF-84311Introduction of SFF-8431Introduction of SFF-8431Introduction of SFF-8431Introduction of SFF-8431 BRIEF INTRODUCTION OF BRIEF INTRODUCTION OF SFF-8431SFF-8431The specification of SFF-8431 defines the electrical interfaces and their test methods between the SFP+module and host board for operation up to 11.1 GBd.The high speed electrical interface between the host and SFP+module is called“SFI”.SFI simplifies the module and leverages host based transmit pre-emphasis and host based receive equalization to overcome PCB and external media impairments.SFI typically operates with one connector at the module interface and up to about 200 mm of improved FR4 material or 150 mm of standard FR4.The electrical interface is based on high speed,low voltage AC coupled logic with a nominal differential impedance of 100.The SFP+specifications includes management,low speed signal,high speed signal,connector(defined by SFF-8083),mechanical(defined by SFF-8432),and appendices providing parameter and test board definitions,and implementation and measurement descriptions.Introduction of SFF-8431 BRIE2Introduction of SFF-8431Introduction of SFF-8431Introduction of SFF-8431Introduction of SFF-8431 The SFP+SUPPORTED STANDARDSIntroduction of SFF-8431 The3Introduction of SFF-8431Introduction of SFF-8431Introduction of SFF-8431Introduction of SFF-8431 POWER SPECIFICATIONS OF SFP+POWER SPECIFICATIONS OF SFP+n The module signal ground contacts VeeR and VeeT should be isolated from module case.n At host power up the host shall supply VccT and VccR to the module within 100 ms of each other.n SFP+low speed signaling is based on Low Voltage TTL(LVTTL)operating with a module supply of 3.3 V+/-5%and with a host supply range of 2.38 to 3.46 V.n To avoid exceeding system power supply limits and cooling capacity,all modules at power up by default shall operate with 1.0 W.Hosts supporting Power Level II operation may enable a Power Level II module through the 2-wire interface.Power Level II modules shall assert the power level declaration bit of SFF-8472.Over long spans such as the 40km Ethernet extended reach(ER)long wavelength applications,the SFP+transceivers may require additional power consumption,especially at extreme operating conditions.Power Level I modules Up to 1.0 W Power Level II modules Up to 1.5 WGENERAL REQUIREMENTS Introduction of SFF-8431 POWE4Introduction of SFF-8431Introduction of SFF-8431Introduction of SFF-8431Introduction of SFF-8431n n The maximum power level is allowed to exceed the classified power level for 500 ms following hot insertion or power up,or Power Level II authorization,however the current is limited to values given by the following table.POWER SPECIFICATIONS OF SFP+POWER SPECIFICATIONS OF SFP+Introduction of SFF-8431 The 5Introduction of SFF-8431Introduction of SFF-8431Introduction of SFF-8431Introduction of SFF-8431n n The SFP+module shall meet ESD requirements given in EN61000-4-2,criterion B test specification such that units are subjected to 15 kV air discharges during operation and 8 kV direct contact discharges to the case.Introduction of SFF-8431 The 6Introduction of SFF-8431Introduction of SFF-8431Introduction of SFF-8431Introduction of SFF-8431 HIGH SPEED ELECTRICAL SPECIFICATIONS of SFI HIGH SPEED ELECTRICAL SPECIFICATIONS of SFISFI signaling is based on differential high speed low voltage logic with AC coupling in the module.SFI was developed with the primary goal of low power and low electromagnetic interference(EMI).To satisfy this requirement the nominal differential signal levels are 500 mV p-p with edge speed control to reduce EMI.Introduction of SFF-8431 HIGH7Notes：For differential signal eye test,subtract the two differential sources we using to define a math as the aimed signal source.Bandwidth is determined by the capabilities of the installed modules;100 Mb/s to 12.SFF-8431 Standard Compliance Test of SFIEye Diagram Test by DSA8200TDR modules such as 80E04 allow you to measure cable delays with very high precision.SMA RF coaxial cable with up to 18G bandwidth and the insertion loss is 1.Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Bandwidth is determined by the capabilities of the installed modules;TEST ENVIRONMENT REQUIREMENTSMask SettingSFF-8431 Standard Compliance Test of SFIBandwidth is determined by the capabilities of the installed modules;1 Acquainted with Our Instrument6dB and the coaxial cable is-0.The maximum SFI trace length recommend by the specification of SFF-8431.Minimize skew by using balanced cable pairs.Eye Diagram Test by DSA8200DSA8200 Digital Serial AnalyzerIntroduction of SFF-8431Introduction of SFF-8431Introduction of SFF-8431Introduction of SFF-8431n PCB LAYOUT RECOMMENDATIONSThe PCB traces are recommended by the specification to meet 10010 differential impedace with nominal 7%differential coupling.It is preferable to have the impedance tolerance be 5.Route differential pairs at least 8x their trace-width from other traces.Avoid sharp angles in routing,chamfer corners.In order to avoid reflection,the recommended minimum trace length requirement is“1 inch”in FR4.When there must be vias on the high-speed differential signals,the 100 differential vias is recommended be used.And stubs due to vias must be avoided.The maximum SFI trace length recommend by the specification of SFF-8431.Notes：For differential signal 8SFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFIlTEST ENVIRONMENT REQUIREMENTS1.The bandwidth of measurement instrument shall be 12 GHz or above;2.Require AC coupled test equipment on all test ports；3.All SFI test equipment must have 50ohm single ended impedance；4.Reference impedance for differential measurements is 100ohm,and the reference impedance for common mode measurements is 25ohm;5.Host compliance test board is required.n n SFF-8431 STANDARD COMPLIANCE TEST of SFI SFF-8431 STANDARD COMPLIANCE TEST of SFISFF-8431 Standard Compliance T92 Eye Diagram Test Environment Setup of SFINotes：Select the math we had defined as the waveform database and choose the infinite mode to display it.SFP+low speed signaling is based on Low Voltage TTL(LVTTL)operating with a module supply of 3.Set a STOP ActionDC to 65 GHz optical bandwidth;DC to 70+GHz electrical bandwidth,with up to 12.The propagation delay inherent in connecting cables and probes can result in inaccurate amplitude and time-correlated measurements.CR125A Electrical Clock Recovery instrumentRequire AC coupled test equipment on all test ports；SFF-8431 Standard Compliance Test of SFISetting Math as sourcesPCB LAYOUT RECOMMENDATIONSEye Diagram Test by DSA8200Introduction of SFF-8431Minimize skew by using balanced cable pairs.Bandwidth is determined by the capabilities of the installed modules;DSA8200 Digital Serial AnalyzerTEST ENVIRONMENT REQUIREMENTSDSA8200 Digital Serial AnalyzernTEST METHODOLOGY AND MEASUREMENT A.HOST COMPLIANCE TESTA.1 Test point Host system transmitter and receiver compliance are defined by tests in which a Host Compliance Board is inserted in place of the SFP+module.The compliance points are B.SFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFI2 Eye Diagram Test Environmen10A.2 Measurement setupSFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFIA.2 Measurement setupSFF-8411A.2 TEST EQUIPMENTSFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFIA.2 TEST EQUIPMENTSFF-8431 12A.3 Host Transmitter Output Jitter and Eye Mask Specifications at B SFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFIA.3 Host Transmitter Output13B.10GSFP+Cu DIRECT ATTACH CABLE Compliance TestCompliance Test 10GSFP+Cu cable assemblies are effectively constructed out of a pair of SFP+modules with the OE components replaced with copper cabling.The cable assembly shall incorporate DC blocking capacitors with at least 4.3 V rating on the RX side and with high pass pole of between 20 kHz and 100 kHz.The drain wire is connected to VeeT and to VeeR.The cable shield directly connects the module A and B cases.B.1 10GSFP+Cu Direct Attach ConstructionSFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFI10GSFP+Cu DIRECT ATTACH CABLE 14SFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFIB.2 SFP+Direct Attach Cable Test SetupSFF-8431 Standard Compliance T15SFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFIB.3 10GSFP+Cu Cable Assembly Specifications at B and C SFF-8431 Standard Compliance T16A.Our Test EnvironmentFigure 1Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Our Test EnvironmentFigure 1Ey17B.B.Key features of Test InstrumentsKey features of Test InstrumentsDSA8200 Digital Serial Analyzer DC to 65 GHz optical bandwidth;DC to 70+GHz electrical bandwidth,with up to 12.5 GHz triggering.Bandwidth is determined by the capabilities of the installed modules;CR125A Electrical Clock Recovery instrument100 Mb/s to 12.5 Gb/s continuous data rate coverage;Single-ended or differential 50 data inputs/outputs;DC coupled data through path;Insertion loss:-2.6dB when 12GHz80E04 Electrical Sample Module SMA RF coaxial cable with up to 18G bandwidth and the insertion loss is 1.4dB/m when 10GHz.Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Key features of Test Instrume18C.Installing Test EnvironmentCautionsDo NOT apply a signal outside the Maximum Input Voltage Swing;Always use a wrist strap when making signal connections;Discharge to ground any electrostatic charge that may be present on the center and outer conductors of cables before attaching the cables to the instrument;Never install or remove modules while the instrument is powered on;Do NOT transport or ship the instrument with modules installed;If possible,always use ESD protection module(80E02)along the test path,example,TDR test;Always disable the 80E04s TDR function when not use the TDR function.Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Installing Test EnvironmentEye19C.1 Acquainted with Our Instrumenta)DSA8200 Digital Serial AnalyzerEye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200C.1 Acquainted with Our Instr20Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA820021SFF-8431 Standard Compliance Test of SFIEye Diagram Test by DSA8200To avoid exceeding system power supply limits and cooling capacity,all modules at power up by default shall operate with 1.Eye Diagram Test by DSA8200Step 3：Calibrate our test installingSFF-8431 Standard Compliance Test of SFINotes：Use the vertical buttons to compensate the channel we used.Setting triggerNotes：Please see the attached notes to set the eye diagram test setup.3 10GSFP+Cu Cable Assembly Specifications at B and CSingle-ended or differential 50 data inputs/outputs;Notes：Use the vertical buttons to compensate the channel we used.1 10GSFP+Cu Direct Attach ConstructionDo NOT transport or ship the instrument with modules installed;Notes：For differential signal eye test,subtract the two differential sources we using to define a math as the aimed signal source.1 Acquainted with Our InstrumentSMA RF coaxial cable with up to 18G bandwidth and the insertion loss is 1.GENERAL REQUIREMENTSNever install or remove modules while the instrument is powered on;The cable assembly shall incorporate DC blocking capacitors with at least 4.SFF-8431 Standard Compliance Test of SFIb)CR125A Electrical Clock Recovery instrumentEye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200SFF-8431 Standard Compliance T22c)80E04 Electrical Sampling Module with TDR function.Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA820080E04 Electrical Sampling Modu23C.2 Eye Diagram Test Environment Setup of SFINotes：Please see the attached notes to set the eye diagram test setup.Step 1.Installing the hardware environment Step 1.Installing the hardware environment asas“figure 1figure 1”showing;”showing;Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Step 2.Step 2.POWER ON the instruments and wait 20 minutes for instruments warm-up period POWER ON the instruments and wait 20 minutes for instruments warm-up period ;C.2 Eye Diagram Test Environm24Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Step 3.Step 3.Confirm the TDR function is DISABLED during the eye diagram test to avoid damage Confirm the TDR function is DISABLED during the eye diagram test to avoid damage the 80E04 TDR module;the 80E04 TDR module;Notes:Confirm those check-box under“TDR”SETUPS is unchecked to disable the TDR functions on the test channel.Eye Diagram Test by DSA8200Ste25Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Step 4.Execute compensation and wait until the status of all items warm up to PASS;If the Step 4.Execute compensation and wait until the status of all items warm up to PASS;If the status is Fail,rerun the compensation.If Fail status continues and you have allowed warm up status is Fail,rerun the compensation.If Fail status continues and you have allowed warm up to occur,the module or main instrument may need service.to occur,the module or main instrument may need service.Eye Diagram Test by DSA8200Ste26Step 5.Setting software environment;Step 5.Setting software environment;1.Setting the Display StyleNotes:Select the Infinite Persistence on the“Disp”and the“fast sampling”mode on the front panel.Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Step 5.Setting software envi272.Setting triggerNotes:Select the External Prescaler as the trigger source.Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Setting triggerEye Diagram Tes28SFF-8431 Standard Compliance Test of SFIIntroduction of SFF-84311 Acquainted with Our InstrumentSFF-8431 Standard Compliance Test of SFISFF-8431 Standard Compliance Test of SFIRoute differential pairs at least 8x their trace-width from other traces.Introduction of SFF-8431SFF-8431 Standard Compliance Test of SFI6dB when 12GHzKey features of Test Instruments1 Acquainted with Our InstrumentDC coupled data through path;PCB LAYOUT RECOMMENDATIONSTDR modules such as 80E04 allow you to measure cable delays with very high precision.In order to avoid reflection,the recommended minimum trace length requirement is“1 inch”in FR4.5 Gb/s continuous data rate coverage;Notes：Please see the attached notes to set the eye diagram test setup.The maximum SFI trace length recommend by the specification of SFF-8431.5 Gb/s continuous data rate coverage;100 Mb/s to 12.3.Setting Math as sourcesEye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Notes：For differential signal eye test,subtract the two differential sources we using to define a math as the aimed signal source.SFF-8431 Standard Compliance T29SFF-8431 Standard Compliance Test of SFIEye Diagram Test by DSA8200Do NOT transport or ship the instrument with modules installed;Introduction of SFF-8431The cable assembly shall incorporate DC blocking capacitors with at least 4.SFI typically operates with one connector at the module interface and up to about 200 mm of improved FR4 material or 150 mm of standard FR4.1 Acquainted with Our InstrumentEye Diagram Test by DSA8200CR125A Electrical Clock Recovery instrumentWaveform DatabasesThe drain wire is connected to VeeT and to VeeR.Never install or remove modules while the instrument is powered on;Eye Diagram Test by DSA8200The cable assembly shall incorporate DC blocking capacitors with at least 4.SFP+low speed signaling is based on Low Voltage TTL(LVTTL)operating with a module supply of 3.The propagation delay inherent in connecting cables and probes can result in inaccurate amplitude and time-correlated measurements.Execute compensation and wait until the status of all items warm up to PASS;If the status is Fail,rerun the compensation.Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200If Fail status continues and you have allowed warm up to occur,the module or main instrument may need service.4.Waveform DatabasesEye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Notes：Select the math we had defined as the waveform database and choose the infinite mode to display it.SFF-8431 Standard Compliance T305.Mask SettingEye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Notes：Select our aimed eye mask in the drop-down menu or import customer mask we had defined.Mask SettingEye Diagram Test b313.Setting Measurements Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Notes：Select the signal source and set signal type to“NRZ”.Then,set measurement we aimed to show on the screen,for example,eye height,eye width,Pk-Pk jitter,RMS jitter,and so on.Setting Measurements Eye Diagr326.Set a STOP ActionEye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Set a STOP ActionEye Diagram T337.Restart TestingEye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Restart TestingEye Diagram Tes34Notes：Select the math we had defined as the waveform database and choose the infinite mode to display it.DC to 65 GHz optical bandwidth;DC to 70+GHz electrical bandwidth,with up to 12.Notes：Select the signal source and set signal type to“NRZ”.SFF-8431 Standard Compliance Test of SFINever install or remove modules while the instrument is powered on;PCB LAYOUT RECOMMENDATIONSThe SFP+SUPPORTED STANDARDSSFI typically operates with one connector at the module interface and up to about 200 mm of improved FR4 material or 150 mm of standard FR4.SFF-8431 Standard Compliance Test of SFIGENERAL REQUIREMENTSInstalling Test Environment1 Acquainted with Our Instrument3 V rating on the RX side and with high pass pole of between 20 kHz and 100 kHz.Insertion loss:-2.The compliance points are B.To obtain the best measurement and analysisIn order to avoid reflection,the recommended minimum trace length requirement is“1 inch”in FR4.SMA RF coaxial cable with up to 18G bandwidth and the insertion loss is 1.100 Mb/s to 12.The SFP+specifications includes management,low speed signal,high speed signal,connector(defined by SFF-8083),mechanical(defined by SFF-8432),and appendices providing parameter and test board definitions,and implementation and measurement descriptions.Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Eye Diagram Test by DSA8200Step 3Step 3：Calibrate our test installingCalibrate our test in
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