资源描述
Slide 1/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsThis program is part of the software suitethat accompanies the bookThe Elements of Computing Systemsby Noam Nisan and Shimon SchockenMIT Presswww.idc.ac.il/tecsThis software was developed by students at theEfi Arazi School of Computer Science at IDCChief Software Architect:Yaron UkrainitzHardwareSimulatorTutorialSlide 2/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsBackgroundThe Elements of Computing Systems evolves around the construction of a complete computer system,done in the framework of a 1-or 2-semester course.In the first part of the book/course,we build the hardware platform of a simple yet powerful computer,called Hack.In the second part,we build the computers software hierarchy,consisting of an assembler,a virtual machine,a simple Java-like language called Jack,a compiler for it,and a mini operating system,written in Jack.The book/course is completely self-contained,requiring only programming as a pre-requisite.The books web site includes some 200 test programs,test scripts,and all the software tools necessary for doing all the projects.Slide 3/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsThe books software suiteThis tutorial is about the hardware simulator.Translators(Assembler,JackCompiler):Used to translate from high-level to low-level;Developed by the students,using the books specs;Executable solutions supplied by us.OtherBin:simulators and translators software;builtIn:executable versions of all the logic gates and chips mentioned in the book;OS:executable version of the Jack OS;TextComparer:a text comparison utility.(All the supplied tools are dual-platform:Xxx.bat startsXxx in Windows,and Xxx.sh starts it in Unix)Simulators(HardwareSimulator,CPUEmulator,VMEmulator):Used to build hardware platforms andexecute programs;Supplied by us.Slide 4/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsThe Hack computerThe hardware simulator described in this tutorial can be used to build and test many different hardware platforms.In this book,we focus on one particular computer,called Hack.Hack-a 16-bit computer equipped with a screen and a keyboard-resembles hand-held computers like game machines,PDAs,and cellular telephones.The first 5 chapters of the book specify the elementary gates,combinational chips,sequential chips,and hardware architecture of the Hack computer.All these modules can be built and tested using the hardware simulator described in this tutorial.That is how hardware engineers build chips for real:first,the hardware s designed,tested,and optimized on a softwaresimulator.Only then,the resulting gate logic is committed to silicon.Slide 5/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsHardware Simulation TutorialI.Getting startedII.Test scriptsIII.Built-in chipsIV.Clocked chips V.GUI-empowered chipsVI.Debugging tools VII.The Hack PlatformRelevant reading(from“The Elements of Computing Systems”):Chapter 1:Boolean LogicAppendix A:Hardware Description LanguageAppendix B:Test Scripting LanguageSlide 6/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsHardware Simulation TutorialPart I:Getting StartedSlide 7/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecs/*Exclusive-or gate.out=a xor b*/CHIP Xor IN a,b;OUT out;/Implementation missing.Chip Definition(.hdl file)Chip interface:qName of the chipqNames of its input and output pinsqDocumentation of the intended chip operation Typically supplied by the chip architect;similar to an API,or a contract.chipinterfaceSlide 8/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecs/*Exclusive-or gate.out=a xor b*/CHIP Xor IN a,b;OUT out;PARTS:Not(in=a,out=nota);Not(in=b,out=notb);And(a=a,b=notb,out=w1);And(a=nota,b=b,out=w2);Or(a=w1,b=w2,out=out);Any given chip can be implemented in several different ways.This particular implementation is based on:Xor(a,b)=Or(And(a,Not(b),And(b,Not(a)Not,And,Or:Internal parts(previously built chips),invoked by the HDL programmernota,notb,w1,w2:internal pins,created and named by the HDL programmer;used to connect internal parts.chip implementationchipinterfaceChip Definition(.hdl file)Slide 9/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsLoading a ChipNavigate to a directory and select an.hdl file.Slide 10/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsLoading a ChipNames and current values of the chips input pins;Tochangetheirvalues,enterthenewvalueshere.Read-only view of the loaded.hdl file;Defines thechip logic;To edit it,use an external text editor.Names and current values of the chips output pins;Calculatedbythesimulator;read-only.Names and current values of the chips internal pins(used to connect the chips parts,forming the chips logic);Calculatedbythesimulator;read-only.Slide 11/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsExploring the Chip Logic1.Click the PARTS keyword2.A table pops up,showing the chips internal parts(lower-level chips)and whether they are:Primitive(“given”)or composite(user-defined)Clocked(sequential)or unclocked(combinational)Slide 12/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecs1.Click any one of the chip PARTS2.A table pops up,showing the input/output pins of the selected part(actually,its API),and their current values;A convenient debugging tool.Exploring the Chip LogicSlide 13/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsInteractive Chip Testing1.User:changes the values of some input pins2.Simulator:responds by:Darkening the output and internal pins,to indicate that the displayed values are no longer validEnabling the eval(calculator-shaped)button.Slide 14/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsInteractive Chip Testing1.User:changes the values of some input pins2.Simulator:responds by:Darkening the output and internal pins,to indicate that the displayed values are no longer validEnabling the eval(calculator-shaped)button.Re-calc3.User:Clicked the eval button4.Simulator:re-calculates the values of the chips internal and output pins(i.e.applies the chip logic to the new input values)5.To continue interactive testing,enter new values into the input pins and click the eval button.Slide 15/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsHardware Simulation TutorialPart II:Test ScriptsSlide 16/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsTest Scriptsload Xor.hdl,output-file Xor.out,compare-to Xor.cmp,output-list a%B3.1.3 b%B3.1.3 out%B3.1.3;set a 0,set b 0,eval,output;set a 0,set b 1,eval,output;Etc.If the script specifies a compare file,the simulator will compare the.out file to the.cmp file,line by line.|a|b|out|0|0|0|0|1|1|1|0|1|1|1|0|Generated output file(Xor.out)InitSimulation stepSimulation stepTest scripts:Are used for specifying,automating and replicating chip testingAre supplied for every chip mentioned in the book(so you dont have to write them)Can effect,batch-style,any operation that can be done interactivelyAre written in a simple language described in Appendix B of the bookCan create an output file that records the results of the chip testSlide 17/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsLoading a ScriptTo load a new script(.tst file),click this button;Interactive loading of the chip itself(.hdl file)may not be necessary,since the test script typically contains a“load chip”command.Slide 18/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsScript ControlsExecutes the next simulation stepMulti-step execution,until a pausePauses the script executionResetsthe scriptControls the script execution speedScript=series of simulation steps,each ending with a semicolon.Slide 19/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsRunning a ScriptTypical“init”code:1.Loads a chip definition(.hdl)file2.Initializes an output(.out)file3.Specifies a compare(.cmp)file4.Declares an output line format.Script exec-utionflowSlide 20/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsScript exec-utionendsRunning a ScriptComparison of the output lines to the lines of the.cmp file are reported.Slide 21/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsViewing Output and Compare FilesSlide 22/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsConclusion:the chip logic(Xor.hdl)is apparently correct(but not necessarily efficient).Observation:This output file looks like a Xor truth tableViewing Output and Compare FilesSlide 23/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsHardware Simulation TutorialPart III:Built-in ChipsSlide 24/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsBuilt-In ChipsGeneralA built-in chip has an HDL interface and a Java implementation(e.g.here:Mux16.class)The name of the Java class is specified following the BUILTIN keywordBuilt-In implementations of all the chips that appear in he book are supplied in the tools/buitIn directory./Mux16 gate(example)CHIP Mux16 IN a16,b16,sel;OUT out16;BUILTIN Mux16;Built-in chips are used to:Implement primitive gates(in the computer built in this book:Nand and DFF)Implement chips that have peripheral side effects(like I/O devices)Implement chips that feature a GUI(for debugging)Provide the functionality of chips that the user did not implement for some reasonImprove simulation speed and save memory(when used as parts in complex chips)Facilitate behavioral simulation of a chip before actually building it in HDLBuilt-in chips can be used either explicitly,or implicitly.Slide 25/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsExplicit Use of Built-in ChipsThe chip is loaded from the tools/buitIn directory(includes executable versions of all the chips mentioned in the book).Built-in implementation.Standard interface.Slide 26/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsImplicit Use of Built-in ChipsWhen any HDL file is loaded,the simulator parses its definition.For each internal chip Xxx(.)mentioned in the PARTS section,the simulator looks for an Xxx.hdl file in the same directory(e.g.Not.hdl,And.hdl,and Or.hdl in this example).If Xxx.hdl is found in the current directory(e.g.if it was also written by the user),the simulator uses its HDL logic in the evaluation of the overall chip.If Xxx.hdl is not found in the current directory,the simulator attempts to invoke the file tools/builtIn/Xxx.hdl instead.And since tools/builtIn includes executable versions of all the chips mentioned in the book,it is possible to build and test any of these chips before first building their lower-level parts./*Exclusive-or gate.out=a xor b*/CHIP Xor IN a,b;OUT out;PARTS:Not(in=a,out=Nota);Not(in=b,out=Notb);And(a=a,b=Notb,out=aNotb);And(a=Nota,b=b,out=bNota);Or(a=aNotb,b=bNota,out=out);Slide 27/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsHardware Simulation TutorialPart IV:Clocked Chips(Sequential Logic)Slide 28/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsClocked(Sequential)ChipsThe implementation of clocked chips is based on sequential logicThe operation of clocked chips is regulated by a master clock signal:In our jargon,a clock cycle=tick-phase(low),followed by a tock-phase(high)During a tick-tock,the internal states of all the clocked chips are allowed to change,but their outputs are“latched”At the beginning of the next tick,the outputs of all the clocked chips in the architecture commit to the new valuesIn a real computer,the clock is implemented by an oscillator;in simulators,clock cycles can be simulated either manually by the user,or repeatedly by a test script.Slide 29/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsThe D-Flip-Flop(DFF)GateClocked chipsClocked chips include registers,RAM devices,counters,and the CPUThe simulator knows that the loaded chip is clocked when one or more of its pins is declared“clocked”,or one or more of its parts(or sub-parts,recursively)is a clocked chipIn the hardware platform built in the book,all the clocked chips are based,directly or indirectly,on(many instances of)built-in DFF gates./*Data Flip-flop:*out(t)=in(t-1)*where t is the time unit.*/CHIP DFF IN in;OUT out;BUILTIN DFF;CLOCKED in,out;DFF:A primitive memory gate that can“remember”a state over clock cyclesCan serve as the basic building block of all the clocked chips in a computer.Slide 30/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsSince this built-in chip also happens to be GUI-empowered,the simulator displays its GUI(More about GUI-empowered chips,soon)Simulating Clocked ChipsA built-in,clocked chip(RAM8)is loadedClocked(sequential)chips are clock-regulated.Therefore,the standard way to test a clocked chip is to set its input pins to some values(as with combinational chips),simulate the progression of the clock,and watch how the chip logic responds to the ticks and the tocks.For example,consider the simulation of an 8-word random-access memory chip(RAM8).Slide 31/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecs1.User:enters some input values and clicks the clock icon once(tick)A built-in,clocked chip(RAM8)is loadedSimulating Clocked ChipsSlide 32/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecs1.User:enters some input values and clicks the clock icon once(tick)A built-in,clocked chip(RAM8)is loadedSimulating Clocked Chips2.Simulator:changes the internal state of the chip,but note that the chips output pin is not yet effected.Slide 33/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecs2.Simulator:changes the internal state of the chip,but note that the chips output pin is not yet effected.1.User:enters some input values and clicks the clock icon once(tick)3.User:clicks the clock icon again(tock)A built-in,clocked chip(RAM8)is loadedSimulating Clocked ChipsSlide 34/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecs4.Simulator:commits the chips output pin to the value of the chips internal state.3.User:clicks the clock icon again(tock)A built-in,clocked chip(RAM8)is loaded1.User:enters some input values and clicks the clock icon once(tick)Simulating Clocked Chips2.Simulator:changes the internal state of the chip,but note that the chips output pin is not yet effected.Slide 35/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsSingle-action tick-tockTick-tocks repeatedly and infinitelyControls the script speed,and thus the simulated clock speed,and thus the overall chip execution speedDefault script:always loaded when the simulator starts running;The logic of the default script simply runs the clock repeatedly;Hence,executing the default script has the effect of causing the clock to go through an infinite train of tics and tocks.This,in turn,causes all the clocked chip parts of the loaded chip to react to clock cycles,repeatedly.Simulating Clocked Chips Using a Test ScriptSlide 36/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsHardware Simulation TutorialPart V:GUI-EmpoweredchipsSlide 37/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecs1.A chip whose parts include built-inchips was loaded into the simulator(ignore the chip logic for now)Note:the signature of the internal part does not reveal if the part is implemented by a built-in chip or by another chip built by the user.Thus in this example you have to believe us that all the parts of this loaded chip are built-in chips.Built-in Chips with GUI EffectsSlide 38/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecs2.If the loaded chip or some of its parts have GUI side-effects,the simulator displays the GUIs here.Built-in Chips with GUI Effects1.A chip whose parts include built-inchips was loaded into the simulator(ignore the chip logic for now)GUI of the built-in Screen.hdl chipGUI of the built-in RAM16K.hdl chipGUI of the built-in Keyboard.hdl chipFor each GUI-empowered built-in chip that appears in the definition of the loaded chip,the simulator does its best to put the chip GUI in this area.The actual GUIs behaviors are then effected by the Java classes that implement the built-in chips.Slide 39/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsThe Logic of the GUIDemo Chip/Demo of built-in chips with GUI effectsCHIP GUIDemo IN in16,load,address15;OUT out16;PARTS:RAM16K(in=in,load=load,address=address0.13,out=null);Screen(in=in,load=load,address=address0.12,out=null);Keyboard(out=null);Effect:When the simulator evaluates this chip,it displays the GUI side-effects of its built-in chip partsChip logic:The only purpose of this demo chip is to force the simulator to show the GUI of some built-in chips.Other than that,the chip logic is meaningless:it simultaneously feeds the 16-bit data input(in)into the RAM16K and the Screen chips,and it does nothing with the keyboard.RAM16K,Screen,&Keyboard are built-in chips with GUI side-effectsSlide 40/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecs1.User enters:in=1(=16 1s in binary)address=5012load=1GUIDemo Chip in Action2.User:runs the clock3.16 black pixels are drawn beginning in row=156col=3203.The chip logic routes the in value simultaneously into the Screen chip and the RAM16K chipExplanation:According to the specification of the computer architecture described in the book,the pixels of the physical screen are continuously refreshed from an 8K RAM-resident memory map implemented by the Screen.hdl chip.The exact mapping between this memory chip and the actual pixels is specified in Chapter 5.The refresh process is carried out by the simulator.Slide 41/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsHardware Simulation TutorialPart VI:Debugging toolsSlide 42/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsSystem VariablesThe simulator recognizes and maintains the following variables:Time:the number of time-units(clock-cycles)that elapsed since the script started running is stored in the variable timePins:the values of all the input,output,and internal pins of the simulated chip are accessible as variables,using the names of the pins in the HDL codeGUI elements:the values stored in the states of GUI-empowered built-in chips can be accessed via variables.For example,the value of register 3 of the RAM8 chip can be accessed via RAM83.All these variables can be used in scripts and breakpoints,for debugging.Slide 43/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsBreakpointsThe breakpoints logic:Breakpoint=(variable,value)When the specified variable in some breakpoint reaches its specified value,the script pauses and a message is displayedA powerful debugging tool.1.Open the breakpoints panel2.Previously-declared breakpoints3.Add,delete,or update breakpoints3.To update an existing breakpoint,double-click itSlide 44/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsScripts for Testing the Topmost Computer chipload Computer.hdlROM32K load Max.hack,output-file ComputerMax.out,compare-to ComputerMax.cmp,output-list time%S1.4.1 reset%B2.1.2 ARegister%D1.7.1 DRegister%D1.7.1 PC%D0.4.0 RAM16K0%D1.7.1 RAM16K1%D1.7.1 RAM16K2%D1.7.1;breakpoint PC 10;/First run:compute max(3,5)set RAM16K0 3,set RAM16K1 5,output;repeat 14 tick,tock,output;/Reset the PC(preparing for/second run)set reset 1,tick,tock,output;/Etc.clear-breakpoints;Scripts that test the CPU chip or the Computer chip described in the book usually start by loading a machine-language program(.asm or.hack file)into the ROM32K chipThe rest of the script typically uses various features like:Output filesLoopsBreakpointsVariables manipulationtick,tockEtc.All these features are described in Appendix B of the book(Test Scripting Language).Slide 45/49HW Simulator TutorialTutorial Indexwww.idc.ac.il/tecsVisual OptionsScript:displays the current test scriptOutput:displays the generated output fileCompare:displays the supplied comparison fileScreen:displays the GUI effects of built-in chips,if any.Program flow:animates the flow of the currently loaded program Program&data flow:animates the flow of the current program and the data flow throughout the GUI elements displayed on the screen No animation(default):program and data flow are not animated.Tip:When running programs on the CPU or Computer ch
展开阅读全文