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按一下以編輯母片本文樣式,第二層,第三層,第四層,第五層,按一下以編輯母片標題樣式,Mix-signal MOS Design,Coming Chen,Mix-signal MOS DesignComing Ch,High Speed,Gain Stage,Dynamic Range,Matching,FET&LPNPmatching,Capmatching,Resistormatching,Thermal noise or NF,&,1/f noise,Linearity,Harmonic Distortion,Advanced,CMOS,Analog Design,V/L BJT,Mixed Signal Technology Concern,High SpeedGain StageDynamic Ra,Device Characteristics for Analog/RF,Analog:,High G,m,/I,D,ratio for Lower power,But,CMOS has lower ratio.,High Early Voltage(V,A,)for higher gain,Deep submicron CMOS suffers lower,V,A,.,Good Linearity and low noise:Dynamic range and signal purity,CMOS is good,.,Good matching:,CMOS has,V,T,and area mismatch issues(BJT is better).,Low temperature linearity:BJT is needed for zero-temperature bias circuitry.,RF:,Low Noise Figure and:Dynamic range and signal purity in radio frequency.,CMOS has higher NF(GaAs has better NF)and,Low 1/f noise:important for narrow band application.,CMOS has worse 1/f noise among different device technologies.,Low Gate/base resistance:,In deep sub-micron CMOS,gate resistance limited the width of transistor.Together with edge parasitics concern,combination of device width and total fingers has to consider all the different specification.,Low Power:,Good Substrate Isolation:,Crosstalk suppression and high-Q on-chip components,III-V and SOS CMOS can provide insulating substrate.,Deep N-well.,Device Characteristics for Ana,Requirements for Analog MM/RF,3.3V FET are more widely used than core devices.,G,m,/I,D,ratio and G,m,:,Drivability.,V,A,early voltage:,Transistor Intrinsic Gain,lower power consumption.,Cgg and Junction Cap:,Smaller capacitance results in higher speed and better stability.,FET matching:,Offset voltage(trade-off with chip area),Need detailed Vgs matching at operation range instead of VT matching,Nitrided Gate Oxide(compared to Pure Oxide):,It has smaller low-field mobility(,m,n,),smaller,m,n,at lower V,GT,.,Much higher 1/f noise,impacting on voice band,RF band,direct-conversion.,Parasitic Bipolar Transistor,:,b,3,good V,BE,matching,lower 2kT current.,Vertical PNP can be good for PTAT and Bandgap reference.,High-performance Lateral PNP,Noise Figure(NF),Requirements for Analog MM/RF,Device Technology Comparison,CMOS:,V,TH,mismatch,higher 1/f noise,and lower G,m,/I,D,ratio(drivability).,Good linearity,low cost,suitable for low voltage application.,SOI CMOS:,worst V,TH,mismatch,much higher low-frequency noise.,(compared to CMOS):higher wafer cost,and floating body effect.,Lower junction capacitance and free of body effect for high speed/low power applications.,BJT and SiGe HBT in BiCMOS:,Expensive process,limited for low voltage application(limited by V,BE,).,Con:Higher G,m,/I,D,ratio,Higher F,T,and F,max,especially for SiGe for high speed SONET application.Lower 1/f noise(10 to 100 x smaller than CMOS),Good matching property.,Device Technology ComparisonCM,Passive Device for Analog MM/RF,Precision Capacitor,1.3,s,Matching,2.Linearity(VCC),3.Precision(range),4.Density(fF/um,2,).,VMIM and MOSCAP and LMIM Cap support.,Precision Resistor,1.3,s,Matching,2.Temperature Coeff.(TCR)and VCR,3.Precision(range),4.Sheet Rho(,W,/,1,).,Unsalicide Poly resistor and Spice model.,On-chip Inductor,1.Q,density and f,SR,2.3,s,Matching(for differential pair loading),3.Coupling.,For high Q,current effort is to reduce Rs.How about substrate loss?special ground plane or low-K!,Design Kit:Impact of inductor thickness,metal width and spacing on Q,density and f,SR,.Cover from 900MHz to 4GHz.,Varactor,1.Tuning range.2.Q.3.Density.,N-MOSCAP and P+/N junction Varactors.,Passive Device for Analog MM/,Passive device-Resistor,Performance requirements:,Sheet Rho and Range.Range can be improved by process optimization.,3,s,matching.(3,s,0.5%for an area of 100um2),Unsalicided P+poly resistor has better matching than N+polys.,VCR and TCR.TCR is more important and it depends on implant species and dose.,Resistor Family:,Unsalicided P+poly resistor.,Add an Salicide block mask(free).,The normal rho is 300,W,and range +/-15%.,3,s,matching 0.5%and TCR 3000ppm/C).,Unsalicide poly P-resistor can replace it with an extra Mask cost increase and much higher TCR.,Passive device-ResistorPerf,Passive Device-Capacitor,Performance requirements:,Precision:Capacitance and Range.,Density:high density capacitor save chip area.,Cap matching and VCC1:Good matching save chip area.,Substrate loss and Q:stray capacitance can increase signal loss.,Capacitor Family:,Metal-Insulator-Metal Capacitor(VMIM):needs intra-metal layer and one extra mask.,Good 3,s,matching(0.25%for a value of 0.5pF),good TCC1 and VCC1(1fF/um2),Free for digital process with lower TCC1 and VCC1 than VMIMs,but mismatch is higher than VMIMs.Q is high due to narrow metal spacing(3 and good ideality(less 2kT current)in the operating range(0.5V to 0.7V).,M1,M2,M3,M4,Q1,Q2,Q3,R1,R2,A,nA,PTAT,Current,V,REF,PTAT or Bandgap Reference,VBJT in CMOS Analog DesignPara,Gate-Controlled Lateral PNP BJT,Common Base Configurat
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