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,单击此处编辑母版标题样式,单击此处编辑母版文本样式,第二级,第三级,第四级,第五级,*,*,Wang Xuwen,CBC/YOF,Overview and Operational impact,APZ212 55,APZ 212 55,A highly efficient Central Processor,Board size central processor,Target,BSC,MSC-S BC,MSC,MSC-S,Wln,HLR,Capacity 2 x APZ 212 33,Housed in evolved GEM(EGEM)sub rack,10Gb,Central processor board(CPUB)based on Generic Ericsson Processor(GEP)platform,Optimized for RPB-E in first release,Only new installations in first release,CP,APG,SCB/RP,SCB/RP,APZ 212 55,205 mm,265 mm,75 mm,Note,:Boards are not distributed in magasineaccording to recommendations.,APZ21255 Cabinet layout,SCB-RP4,SCB-RP4,GEP:CPUB 0A,GED:HDD 0B,MAUB 0,GEP:APUB 0B,0,25,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,Media 0,GEP:APUB 0A,GED:HDD 0A,GEP:CPUB 0B,Alarm,FAN,FAN,FAN,FAN,FAN,Air diverter,MXB,MXB,0,25,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,SCB-RP4,SCB-RP4,0,25,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,Side view,Front view,1800,600,400,APZ 212 55,Product Highlights,Compact footprint and few boards,Low power consumption,Re-introduction of MAU,Introducing x86-64 architecture,Based on 1.8 GHz AMD Opteron 64b Dual Core technology,ASAC-JIT adaptations,Capacity above APZ 212 40 performance.,GEP and eGEM as common components,Prepared for future evolution,Gb interconnect,Scalable memory configurations,4GB and 12GB board variants,RPB-S to be introduced in second release(Q1-2008)via new RPBI-S boards,RPBI-S(A)block,1-3 boards,Developed in,phase2,CP Unit block,APG unit block,RPBI-S(B)block,1-3 boards,Developed in,phase2,SCB-RP/4,SCB-RP/4,CPUB-A,CPUB-B,MAUB,APUB-A,APUB-B,DISC-A,DISC-B,Ext Media,(optional),Alarm(optional),EGEM,Reserved for,RPBI-S,Reserved for,RPBI-S,0,1,2,1,0,2,1,0,0,1,0,1,2,APZ 212 55,System issues,Future proof architecture,Many providers of x86-64 technology enables evolution,GEP enables migration,ENUX as common Ericsson Linux enables synergies,Improved ISP,Simplified architecture,Fulfilled IO transfer requirements with APG 43,Prepared for future Memory options,Prepared for 8 and 16GB (not required in RS).,Future evolution possible with respect to,Technology,compiler,capacity,memory,Improved RP transfer capacity in Release2(RPB-S),Prepared for IP stack terminated on CP,Floor space,APZ CP characteristics comparison,APZ 212 33,APZ 212 33C,APZ 212 50,APZ 212 40,APZ 212 55,Available space for APT,Memory Size,APZ 212 33,APZ 212 33C,APZ 212 50,APZ 212 40,APZ 212 55,APZ CP characteristics comparison,Real time capacity,APZ 212 33,APZ 212 33C,APZ 212 50,APZ 212 40,APZ 212 55,APZ CP characteristics comparison,APZ 212 55 with RPB-E in EGEM,CP kernel,(A-side),SCB-A,MAUB,APG-B,CP kernel,(B-side),APG-A,SCB-B,RPB-E,(B-side),IPN,EXB(IS attach),RPB-E,(A-side),IPN,EXB(IS attach),CP-A,CP-B,Backplane,UPB bus,CCSB,CPUB,(A-side),SCB-RP/4,MAUB,APG-B,CPUB,(B-side),APG-A,SCB-RP/4,CP-A,CP-B,RPBI,RPBI,RPBI,RPBI,RPBI,RPBI,RPBI-S,RPBI-S,RPB-S,(B-side),RPB-S,(A-side),APZ 212 55 with RPB-E/RPB-S in EGEM,RPB-E,(A-side),IPN,EXB(IS attach),RPB-E,(B-side),IPN,EXB(IS attach),CPUB HW,ENUX,DD,OSI,HAL,VM/ASAC,APZ OS,MAUB HW,OSE,DD,MAUR FW,CPT FW,RPBI-S HW,OSE,DD,”GWR”,FW,AP HW,APOS,ACS,STS,SCB-RP/4,SCB-RP/4,IO,Layered HW architecture,Redundant Gb Ethernet,TIPC,SNMP,TCP/IP,IPMI,M-bus,RPB-S,UPB,RPB-E,IPN,RPB-E,IPN,CCSB,.,2 x 1Gb Ethernet,RS.232,2 x-48V,APZ 212 55CENTRAL PROCESSOROperational Impact,Main system differences,APZ 212 50 has been base line,The Central Processor system is allocated in an Evolved Generic Ericsson Magazine(EGEM).,The MAU is re introduced and all its functions re-allocated to MAUB board.,The central processor is co located in the same magazine as APG43.,Memory size is optional in 2 variants 4GByte and 12 GByte.CPUB replacement needed for extended memory option.,File size limit is only limited by system memory.,Field Replaceable Unit(FRU)is board rather than server.,Main system differences(cont.),Cabling is limited to UPB bus and CCSB cables.,Simplified IP configuration handling,via IP configuration tables on APG43.,Only inter-work with APG43 is supported.,Only RPB-E is supported in first release,RPB-S delivered in CM12(Q1-2008).,The distribution of bandwidth will allow each RPB-S branch to be fully utilized.,SCB-RP/4 provides switching capabilities,Maintenance bus support,Fan supervision,Power supervision etc.It is also referred to as FLX(first level switch).,FLX repair is a new OPI.,New hardware structure,APZ 212 55 are located in an eGEM magazine that will house:,2-(30 mm.)Central Processor Boards(CPUB).,1-(15 mm.)Maintenance Unit Board(MAUB).,2-(15 mm.)SCB-RP boards.,1-3 x 2-(15mm.)RPBI-S boards.This board will replace the APZ unique functionality RPH which consisted of the boards RPIO2 and RPIRS boards.Depending on the number of RPB-S there may up to 6 RPBI boards where each pair serves 10 RPB-S branches.,The RPBI-S will be released as CNI Q1-2008.,Cabling,The following physical interfaces exist:,The update channel UPB between the CP(A)and CP(B)is a redundant dual 1Gbps
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