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*,单击此处编辑母版标题样式,单击此处编辑母版文本样式,第二级,第三级,第四级,第五级,Class exercise,1、,一把密码锁有三个按键,分别为X,Y,Z。当三个键都不按下时,锁不开,也不报警;当只有一个键按下时,锁打不开,但发出警报信号;当有两个键同时按下时,锁打开,也不报警;当三个键同时按下时,锁被打开,但要报警。,试设计此逻辑电路,要求用3线-8线 译码器和与非门实现。,G1,G2A-L,G2B-L,B,C,A,Y0_L,Y1_L,Y7_L,Y2_L,Y3_L,Y4_L,Y5_L,Y6_L,低位,高位,Yi = EN ,mi,G1,G2A_L,G2B_L,EN,Yi_L = Yi = ( EN ,mi,),EN = G1 G2A G2B,= G1 G2A_L G2B_L,Y0_L,Y1_L,Y7_L,Y2_L,Y3_L,Y4_L,Y5_L,Y6_L,EN,Z,Y,X,A,B,C,G1,G2A,G2B,Y0,Y1,Y2,Y3,Y4,Y5,Y6,Y7,74x138,+5V,F,Answer key for exercise 1,Answer key for exercise 2,Example 1,Answer key for example 1,Review of Last Class,Decoder,74X138,74X139,Cascading Binary Decoders,BCD Decoder,Seven-Segment Decoders,G1,G2A-L,G2B-L,B,C,A,Y0_L,Y1_L,Y7_L,Y2_L,Y3_L,Y4_L,Y5_L,Y6_L,低位,高位,Yi = EN ,mi,Yi_L = Yi = ( EN ,mi,),The 74x138 3-to-8 Decoder,74x139,The 74x139 Dual 2-to-4 Decoder,N0,N1,N2,N3,EN_L,+5V,D0_L,D7_L,D8_L,D15_L,思路:,16个输出需要,2,片74x138?,Y0,Y7,A,B,C,G1,G2A,G2B,Y0,Y7,A,B,C,G1,G2A,G2B,U1,U2,任何时刻只有一片在工作。,4个输入中,,N3,位控制片选,N2N1N0,位控制输入,design the 4-to-16 decoder,二-十进制译码器,0 0 0 0,0 0 0 1,0 0 1 0,0 0 1 1,0 1 0 0,0 1 0 1,0 1 1 0,0 1 1 1,1 0 0 0,1 0 0 1,1 0 1 0,1 0 1 1,1 1 0 0,1 1 0 1,1 1 1 0,1 1 1 1,0 1 1 1 1 1 1 1 1 1,1 0 1 1 1 1 1 1 1 1,1 1 0 1 1 1 1 1 1 1,1 1 1 0 1 1 1 1 1 1,1 1 1 1 0 1 1 1 1 1,1 1 1 1 1 0 1 1 1 1,1 1 1 1 1 1 0 1 1 1,1 1 1 1 1 1 1 0 1 1,1 1 1 1 1 1 1 1 0 1,1 1 1 1 1 1 1 1 1 0,1 1 1 1 1 1 1 1 1 1,1 1 1 1 1 1 1 1 1 1,1 1 1 1 1 1 1 1 1 1,1 1 1 1 1 1 1 1 1 1,1 1 1 1 1 1 1 1 1 1,1 1 1 1 1 1 1 1 1 1,I3,I2,I1,I0,0,1,2,3,4,5,6,7,8,9,Y0_L,Y9_L,伪,码,任 意 项,BCD Decoder,Seven-Segment Decoders,a,b,c,d,e,f,g,dp,公共阴极,a,b,c,d,e,f,g,d p,Normally use,(常用的有):,Light-Emitting Diodes,(LED,半导体数码管),Liquid-Crystal Display,(LCD,液晶数码管),a,b,c,d,e,f,g,dp,公共阳极,七段显示译码器的真值表,0 0 0 0,0 0 0 1,0 0 1 0,0 0 1 1,0 1 0 0,0 1 0 1,0 1 1 0,0 1 1 1,1 0 0 0,1 0 0 1,1 0 1 0,1 0 1 1,1 1 0 0,1 1 0 1,1 1 1 0,1 1 1 1,1 1 1 1 1 1 0,0 1 1 0 0 0 0,1 1 0 1 1 0 1,1 1 1 1 0 0 1,0 1 1 0 0 1 1,1 0 1 1 0 1 1,0 0 1 1 1 1 1,1 1 1 0 0 0 0,1 1 1 1 1 1 1,1 1 1 0 0 1 1,0 0 0 1 1 0 1,0 0 1 1 0 0 1,0 1 0 0 0 1 1,1 0 0 1 0 1 1,0 0 0 1 1 1 1,0 0 0 0 0 0 0,A3,A2,A1,A0,a b c d e f g,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,6.5 Encoder,ENCODER (P408),If the devices output code has,fewer,bits than the input code, the device is usually,called,an,encoder,.,Probably the simplest encoder to build is a,2,n,-to-,n,or,binary encoder,.,encoder(编码器),Binary,encoder,Y0,Y1,Y2,I0,I1,I7,1,0 0 0 0 0 0 0 0 0 0,0,1,0 0 0 0 0 0 0 0 1,0 0,1,0 0 0 0 0 0 1 0,0 0 0,1,0 0 0 0 0 1 1,0 0 0 0,1,0 0 0 1 0 0,0 0 0 0 0,1,0 0 1 0 1,0 0 0 0 0 0,1,0 1 1 0,0 0 0 0 0 0 0,1,1 1 1,I0 I1 I2 I3 I4 I5 I6 I7,Y2 Y1 Y0,The truth table for,a 8-to-3 binary decoder,2,n,inputs,n,outputs,encoder (编码器),Y0 = I1 + I3 + I5 + I7,Y1 = I2 + I3 + I6 + I7,Y2 = I4 + I5 + I6 + I7,前提:任何时刻只有,一个输入端有效。,1,0 0 0 0 0 0 0 0 0 0,0,1,0 0 0 0 0 0 0 0 1,0 0,1,0 0 0 0 0 0 1 0,0 0 0,1,0 0 0 0 0 1 1,0 0 0 0,1,0 0 0 1 0 0,0 0 0 0 0,1,0 0 1 0 1,0 0 0 0 0 0,1,0 1 1 0,0 0 0 0 0 0 0,1,1 1 1,I0 I1 I2 I3 I4 I5 I6 I7,Y2 Y1 Y0,The truth table for,a 8-to-3 binary decoder,Binary,encoder,Y0,Y1,Y2,I0,I1,I7,2,n,inputs,n,outputs,encoder (编码器),Y0 = I1 + I3 + I5 + I7,Y1 = I2 + I3 + I6 + I7,Y2 = I4 + I5 + I6 + I7,前提:任何时刻只有,一个输入端有效。,Trouble:,When more than One Inputs are asserted?,优先级(priority),1,0 0 0 0 0 0 0 0 0 0,0,1,0 0 0 0 0 0 0 0 1,0 0,1,0 0 0 0 0 0 1 0,0 0 0,1,0 0 0 0 0 1 1,0 0 0 0,1,0 0 0 1 0 0,0 0 0 0 0,1,0 0 1 0 1,0 0 0 0 0 0,1,0 1 1 0,0 0 0 0 0 0 0,1,1 1 1,I0 I1 I2 I3 I4 I5 I6 I7,Y2 Y1 Y0,The truth table for,a 8-to-3 binary decoder,If multiple requests can be made simultaneously , how can the encoding device decide which?,The solution is to assign,priority,to the input lines, so that when multiple requests are asserted, the encoding device,produces the number of the highest-priority requestor. Such a device is called,a,priority encoder,.,(P408),6.5.1 Priority Encoders (P410 ),(优先编码器),A2,A1,A0,IDLE,I7,I6,I5,I4,I3,I2,I1,I0,将 I0I7 转换为 H0H7,,保证其中,任何时刻只有一个有效,H7 = I7,H6 = I6 I7,H5 = I5 I6 I7,H0 = I0 I1 I2 I6 I7,A2 = H4 + H5 + H6 + H7,A1 = H2 + H3 + H6 + H7,A0 = H1 + H3 + H5 + H7,Highest-Priority,数大优先,如果没有输入有效,则 IDLE 为1,IDLE = I1 I2 I6 I7,Logic symbol for a generic 8-input priority encoder.,6.5.2 The 74x148 Priority Encoder (P411),The,74x148,is a commercially available, MSI 8-input priority encoder.,EI-L,I7-L,I6-L,I5-L,I4-L,I3-L,I2-L,I1-L,I0-L,A2-L,A1-L,A0-L,GS-L,EO-L,its inputs and outputs are active low.,inputs,outputs,Enable output,使能输出,用于级联,EO,Group Select,(选通输出),GS,EI_L有效,没有输入请求,EO_L有效,Enable Inputs,使能输入,EI-L,EI_L有效,有输入请求,GS_L有效,P411,The EO_L signal is an enable,output,designed to be,connected to,the,EI_L input of another 148,that handles,lower-priority requests.,(P412),lower-priority 148,Higher-priority 148,Two 74x148 cascaded to handle 16 requests.,Q15_L,Q8_L,Q7_L,Q0_L,Y3,Y2,Y1,Y0,GS,Q,15-L,.Q,O-L,Y3,Y2,Y1,Y0,0 XX.X,1,1,1,1,1.0,0,0,0,0,A2,A1,A0,GS,EO,EI,I7,I0,A2,A1,A0,GS,EO,EI,I7,I0,Q15_L,Q8_L,Q7_L,Q0_L,Y0,Y1,Y2,Y3,GS,Two 74x148 cascaded to handle 16 requests.,级联为164优先编码器,输入:由8,64,,需8片74x148,每片优先级不同(怎样实现?),保证高位无输入请求时,次高位才工作,高位芯片的EO-L端接次高位芯片的EI-L端,用8-3优先编码器74x148级联为64-6优先编码器,A2,A1,A0,GS,EO,EI,I7,I0,片间优先级的编码, 利用第9片74x148,每片的,GS,端接到第,9,片的输入端,第,9,片的输出作为高,3,位(,RA5,RA3,),片内优先级,片间优先级,输出:,6,位,低3位,高3位,8片输出A2A0,通过或门作为,最终输出的低3位,RA2RA0,(P413),分析判定优先级电路:(利用,74x148 ),8,个,_,电平有效输入,I0_L,I7_L,,,_,的优先级最高,地址输出,A2,A0,,,_,电平有效,若输出,AVALID,高电平有效,则表示,_,A2,A1,A0,GS,EO,EI,74x148,I7,I0,I0_L,I7_L,A2,A1,A0,AVALID,低,I0_L,至少有一个输入有效,高,设计判定优先级电路:,(利用74x148 ),8,个输入,I0,I7,高电平有效,,I7,优先级最高,地址输出,A2,A0,,,高电平有效,如果没有输入有效,,A2,A0,为,000,且输出,IDLE=1,有效,I7,I0,A2,A1,A0,IDLE,A2,A1,A0,GS,EO,EI,I7,I0,74x148,Example for 74XX148,利用优先编码器(Priority Encoder)74x148构成8421 BCD码编码器(BCD Encoder)。,【解答】,当输入为D8_L或D9_L时,需要另外添加电路实现编码,由于D8_L的BCD编码为0111,D9_L的BCD编码为0110,而D0_L D7_L的编码最高位(MSB)都为1,因此BCD码编码器的最高位(MSB)输出为。,当74x148优先编码器的编码使能端(Encoder Enable)EI_L=1时,编码器不工作,编码输出端Y2_L、Y1_L和Y0_L都为1,因此令,用优先编码器74x148和门电路,可以构成BCD码编码器,如图所示。,6.6 Three-State Devices (三态缓冲器),6.6 Three-State Devices (三态缓冲器) (P418),The most basic three-state device is a,three-state buffer, often called a,three-state driver,.,The,extra signal at the top of the symbol,is a,three-state enable,input, which may be active high or active low ,When the enable input is asserted, the device behaves like an ordinary,buffer or inverter.,When the enable input is negated, the device output “floats”; that is, it goes to a,highimpedance (Hi-Z),disconnected state and functionally behaves as if it werent even there.,6.6 Three-State Devices (三态缓冲器) (P418),三态缓冲器(三态驱动器),74x125:低电平使能,输出不反相,74x126:高电平使能,输出不反相,独立使能,74x541:两个公共使能端,低电平使能,,施密特触发输入,输出不反相(P272图5-57),标准,SSI,和,MSI,三态缓冲器,Typical three-state devices are designed so that they go into the Hi-Z state faster than they come out of the Hi-Z state.,典型的三态器件,进入高阻态比离开高阻态快!,EN1,EN2_L,EN3_L,SSRC0,SSRC1,SSRC2,A,B,C,G1,G2A,G2B,Y0,Y1,Y2,Y3,Y4,Y5,Y6,Y7,74x138,P0,P1,P7,SDATA,A,B,C,G1,G2A,G2B,Y0,Y1,Y2,Y3,Y4,Y5,Y6,Y7,74x138,EN1,EN2_L,EN3_L,SSRC0,SSRC1,SSRC2,一般器件不允许信号共享单个“同线”(party line),P,Q,W,SDATA,A,B,C,G1,G2A,G2B,Y0,Y1,Y2,Y3,Y4,Y5,Y6,Y7,74x138,EN1,EN2_L,EN3_L,SSRC0,SSRC1,SSRC2,冲突(fighting),利用使能端进行时序控制.,三态器件允许信号共享单个“同线”(party line),典型的三态器件,进入高阻态比离开高阻态快,P,Q,W,SDATA,EN1,EN2_L, EN3_L,max(t,pLZmax, t,pHZmax,),min(t,pZLmin,t,pZHmin,),SSRC2:0,0,1,2,3,7,SDATA,P,Q,R,S,W,Dead time,截止时间,6.6.2 Standard SSI and MSI,Three-State Buffers,74X574,74X245,The 74x541,octal three-state,buffer,A1,A8,G1,G2,Y1,Y7,74x541,DB0:7,A1,A8,G1,G2,Y1,Y7,74x541,Example 1,数据总线( Data Bus )的表示法,SEL1-L,SEL2-L,RD-L,RD-L,The 74x245 octal,three-state transceiver,A1,B1,DIR,Example 2 :,利用三态缓冲器实现数据双向传送,DIR,G_L,(P 514),6.47,6.52,6.53,Please hand,your home work,on,Next WEEK!,HOMEWORK,
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