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,MAIN TITLE 24 POINT BOLD CAPSSub-Title 20 Point Title Case,Click to edit Master text styles,Second level,Third level,Fourth level,Fifth level,Lattice Diamond Seminar February 2011,Lattice Semiconductor Confidential,Page:,117,Lattice Diamond 1.3 Seminar,Brian CaslisSoftware Marketing EngineerSeptember 23, 2011,AGENDA,Lattice Diamond Overview,Tool structure, usage, GUI,Differences from ispLEVER,Projects,Implementations & strategies, HDL checking,Importing from ispLEVER,Lab 1: Importing design and adding Lattice Diamond features,Process Flow and Tools,Implementation steps; synthesis, translate, map, PAR,Flow tools; run manager, trace report, simulation,Lab 2: Implementing a design and simulating,Key Tools and Tasks,IPexpress, spreadsheet / netlist / package / floorplan,Timing analyzer, SSO analysis, power calculator,Lab 3: Analyzing timing & power,Device programming, Reveal debugging,Lab 4: Programming & Reveal hardware debug,WHAT IS LATTICE DIAMOND?,Built on existing foundation for cost sensitive, low power applications,Implementation engines (MAP, PAR, etc.),I/O placement,IP reuse,Power calculation,SSO analysis,HW/SW system design LatticeMico System,Modern replacement for ispLEVER design environment,Modern GUI,Ease of use,Improved design flow,Better scripting support,Reduced memory footprint,Foundation for future feature expansion,LATTICE DIAMOND FEATURES & BENEFITS,Design exploration features,Implementations & Strategies,Run Manager,Integrated HDL checking,Synthesis Options,Ease of use,New modern user interface (direct task navigation),More robust projects,Centralized reports & summary,Extensive cross-probing,ECO Editor & Programmer,Improved design flow,Timing Analyzer view,Simulation Wizard,Tcl scripting,DIAMOND SOFTWARE AVAILABILITY,Free software download & license available,Available as annual (12 months) free license,Includes Mach XO2, Mach XO, XP, XP2, EC/P, & ECP2 device support,Includes Synopsys Synplify Pro for Lattice & Lattice Synthesis Engine (LSE),Includes Aldec Active-HDL Lattice Edition II Simulator for mixed language and increased performance,Available for download:, subscription license,Available as annual (12 months) subscription license,Includes all features from Diamond free license software,Enables ECP3, ECP2M, & SC/M device support (SERDES devices),License can be used with existing Diamond free software installation,OTHER AVAILABLE LATTICE SOFTWARE,LatticeMico System,32-bit & 8-bit embedded microprocessor system development environment,Diamond-specific installation available for download,ispLEVER Classic,Design environment for SPLD, PLD, and mature FPGA devices,Separate software installation available for download,License included with Diamond,Programmer & ispVM,Programming software for all Lattice devices,Programmer included with Diamond and available as separate download,PAC Designer,Design environment for Lattice Power Manager and ispClock devices,Separate software installation available for download,DIAMOND SOFTWARE ARCHITECTURE,User Interaction via GUI or Command-Line,QT Provides Native GUI for Windows & Linux,Single Device / Design Database for Reduced Memory,TCL Engine,FPGA Engine,Engine Interface,Interface,TCL Console,Message System,PureC+,QT,Spreadsheet View,Spreadsheet View,Spreadsheet View,Spreadsheet View,Spreadsheet View,Spreadsheet View,Spreadsheet View,Tool Views,TCL Console,CommonDatabase,GUI Interface,User,Input,User,Input,Diamond Main Window,Common Database: common device, design and LPF preference DB,DIAMOND USER INTERFACE BASICS,Integrated environment,Shared menus & toolbars,Detachable views and panels,common menus and toolbars,task and toolspecific views,project wide views,common console and outputs,9,DIAMOND UI TOOLBARS & ICONS,Standard file & operation,Start Page, Reports, Zooming,Project,Design,Run controls,Tools,Grouping,Update,Detach view or panel,Re-attach view,Split, merge, move panels & views,Save & Load Window Layouts,Tool View Tab showing changed data (*),10,DIAMOND UI DOCKED & UNDOCKED VIEW EXAMPLE,Tools and Panels Can be Docked / Undocked,Supports Fully Integrated Views,Supports Mix of Integrated and Separate Views,Timing Analyzer View Docked,Timing Analyzer View Undocked,CROSS-PROBING SUPPORT BETWEEN VIEWS,Integrated environment supports cross-probing between views,Spreadsheet - Package, Floorplanner,Package - Spreadsheet, Netlist, NCD, Floorplanner, ECO Editor, Device,Netlist - Spreadsheet, NCD, Package, Floorplanner, ECO Editor,NCD - Spreadsheet, Netlist, Floorplanner, Physical, ECO Editor,Timing Analyzer - Spreadsheet, Floorplanner, Physical,Physical - Floorplanner, NCD, Device, ECO Editor,Device - Package, Physical, Floorplanner,Floorplanner - Physical, Package, Netlist, NCD, Spreadsheet, Device, ECO Editor,ECO Editor - Floorplanner, Package, Physical,HDL Diagram - Text Editor,12,COMMON UI TASKS - VIEWS,Detach & Attach Dock Views,Dock Views are tabs within Project Panel or Console Panel,File List, Process, Hierarchy, Module Library, Dictionary,Tcl Console, Output, Warning, Error,Detach & Attach Application Tool Views,Application Tools Views are tabs within the Tool Panel that related to specific tools,HDL Diagram, Spreadsheet View, Floorplan View, IPExpress, etc,Save and Load Common Views,Use Window - Save Layout & Window - Manage Layout to save or load payouts,Check “Launch view when loaded” to launch tools if needed,Click to unattach,Click to unattach,Double-click to attach,Click to attach,13,COMMON UI TASKS TAB GROUPING,To View Multiple Tool Views Simultaneously Use Tab Grouping,“Split Tab Group” splits the Tool View panel into two panels side by side,Tabs can be dragged from one panel to the other,“Merge Tab Group” combines the two panels back into one,“Integrate All Tools” will re-attach any unattached tool views,Example Split Tab Group Usage,When using “Show in” command in one view, this allows both views to be seen together (Physical View & Floorplan View show),DIAMOND START PAGE,Initial view when opening Diamond,Provides fast access to recent projects, opening projects, and importing,Checks for software updates,Provides common links to documentation and help,Diamond UI Tip,Initial startup behavior can be changed in the Tools Options menu,DIAMOND REPORTS VIEW,Provides list of generated reports for easy access and viewing,Both current and non-current (previous run) reports can be viewed,Each report name in the list can be expanded to jump directly to report sections,Reports are also saved in implementation directories in text format,Diamond UI Tip,Report icons show status (not run, current, not current),DIAMOND PROJECT-WIDE VIEWS,Project-Wide views independent of tool views,Automatically opened for any project,File List, Process,Only opened after “Generate Hierarchy”,Module library, Dictionary, Hierarchy,Follows Dock View attaching /detaching,Diamond UI Tip,Dock View tabs can be detached and then dragged back into panel in a different position. Multiple tabs can be arranged to be viewed at the same time.,DIAMOND CONSOLE VIEWS,Console has four views available,Tcl Console has all generated Tcl commands,Output contains all generated output,Error contains all error messages from all run tools,Warning contains all warning messages from all run tools,Messages are cumulative from all runs while Diamond is open,Each tab can be detached and attached,Follows Dock View attaching /detaching,Diamond UI Tip,In Tcl Console tab, to save a Tcl script, type “save_script ”,Tcl SCRIPTING SUPPORT,New Tcl dictionaries in Diamond,Project commands,Process execution,Data commands,Design analysis,Reveal debug,Power calculation,Programming commands,Tcl scripts can be run from GUI or shell,From GUI Tcl console, commands can be viewed and entered,From the Diamond TCL Console application (equivalent to tclsh),From a shell by running the pnmainc.exe with the correct setup and scripts,19,SHARED MEMORY DIFFERENCES,Common database used for device & design information,Database is shared by open tool views which reduces memory compared to ispLEVER,Design and Tool Information kept in memory to allow faster tool launching,User can use Clear Memory Tool to free memory,Diamond UI Tip,If no tool views open, clear memory tool runs without confirmation,If tool views are open, clear memory tool asks for confirmation and closes open tools,GUI DIFFERENCES FROM ISPLEVER,ispLEVER,Diamond,Windowing Behavior,Discrete windows,Little shared access,Integrated environment, detachable windows,Common menus, toolbar, behavior,Shared access across tools within environment,Design Planner Changes,Separate tool with separate tool windows,Tools integrated within environment (spreadsheet, etc),No separate Design Planner tool,Tool Menu,Links to separate tools,Links to integrated tool views only (exception simulation & synthesis),Access to LatticeMico System through OS Start menu (not Tools menu).,Other standalone tools in both (Programmer & Power Calculator),FUNCTIONALITY DIFFERENCES FROM ISPLEVER,ispLEVER,Diamond,Shared Design Memory,Each tool has separate design memory usage,Shared memory for loaded design between all Diamond tool views,Editing from one tool affects contents edited by all tools (except text editor),I/O Assistant Flow,Separate mode in ispLEVER,Select “I/O Assistant” strategy in order to run the same flow,Simulation,Simple testbench only supported,Start simulation by selecting testbench file and clicking in process list,Complex multiple file testbenches supported,Different models supported for simulation and synthesis,Use Simulation Wizard to select which type of simulation to run,OS Support,Windows 7 not supported,Windows 7 32 bit and 64 bit supported,AGENDA,Lattice Diamond Overview,Tool structure, usage, GUI,Differences from ispLEVER,Projects,Implementations & strategies, HDL checking,Importing from ispLEVER,Lab 1: Importing design and adding Lattice Diamond features,Process Flow and Tools,Implementation steps; synthesis, translate, map, PAR,Flow tools; run manager, trace report, simulation,Lab 2: Implementing a design and simulating,Key Tools and Tasks,IPexpress, spreadsheet / netlist / package / floorplan,Timing analyzer, SSO analysis, power calculator,Lab 3: Analyzing timing & power,Device programming, Reveal debugging,Lab 4: Programming & Reveal hardware debug,PROJECT FILE COMPATIBILITY,Diamond 1.3 Project Files are Not Compatible to Previous Releases,New file type support,New simulation file options,New file list passing rules,Dialog is Opened When Older Project File Read,Dialog warns that projects will be made incompatible,Users should archive projects first if still used with older versions,Diamond 1.3 Projects Opened in Diamond 1.2,Dialog warns that there may be unexpected results,Will cause problems if any new file types used,PROJECTS OVERVIEW,Implementations support exploring different design structure alternatives,Strategies support exploring different design results from different tool settings,Single project that can manage all source types,Direct management of constraint files, debug files, simulation scripts, and analysis files,Diamond UI Tip,From menu bar select Project-Property Pages to set various project attributes,IMPLEMENTATIONS,Implementations define the design structural elements for a project including source code, constraint files, and debug insertion,Implementation contains all source files, constraint files, debug files, scripts, and analysis files,Source can mix VHDL, Verilog, & EDIF,Files can be referenced or included in the implementation,Referenced files can be shared between implementations,Active Implementation,Inactive Implementations,Diamond UI Tip,Right-click on implementation name to set active / inactive,Right-click on implementation name to set design top-level,STRATEGIES,Strategies are all the implementation related tool settings collected in one convenient location,Single point for implementation settings,Replaces separate tool property settings in ispLEVER,Multiple strategies allowed per project,Each implementation has one active strategy,Active strategy for active implementation,Strategies shared in project,Diamond UI Tip,Double-click on strategy name to open strategy dialog,IMPLEMENTATIONS & STRATEGIES USAGE EXAMPLE,Use a single structure and multiple settings to explore best tool options for implementing (figure 1),Use multiple structures and a single setting to explore best architecture options for implementing (figure 2),Implementation / strategy pairs can be controlled by Run Manager,Implementation,Strategy,Implementation,Strategy,Implementation,Strategy,Implementation,Implementation,Strategy,Implementation,Figure 1,Exploring Different Settings,Figure 2,Exploring Different Structures,FILE LIST VIEW,Supports multiple implementations in a single project,Supports multiple shared strategies in a project,Supports mixed Verilog, VHDL, EDIF in single implementation,Manage multiple constraint & preference files,Only one active at a time,Manage Reveal debug files, simulation wizard script files, analysis files, and programming files,Multiple Strategies,Multiple Implementations,Verilog,VHDL,EDIF,LPF Preference Files,Debug Files,Active Implementation Details,Analysis Files,Active Strategy,Synthesis Constraints,PROCESS VIEW,Double-click process to run it,Right-click process to access run control popup menu,Processes generate report files viewed in the Reports View,Each process displays icon to show status,Not run yet,Running,Completed with warnings,Not Completed (Failed),Completed,Process Status Icons,Diamond UI Tip,Improved Map & PAR sub-process controls in Diamond 1.2 & later,Process popup menu,HDL CHECKING (GENERATE HIERARCHY),Access HDL Checking from toolbar or menu,Must be done to access design hierarchy view,Parses design for rule checking and opens three project-wide views (Hierarchy, Module Library, Dictionary),After generating hierarchy, BKM (Best Known Method) rule checks can be run on design,HIERARCHY VIEW,Shows elaborated design hierarchy which can be expanded & collapsed,Shows post-synthesis resource usage (after synthesis is run),Hover over module to view tooltip for info including source file name,Right-click popup menu provides:,Access to source file where module is defined or instantiated,Ability to generate schematic symbol,Ability to generate testbench template,Set as top-level unit,Run BKM checks,Open HDL Diagram views,Diamond UI Tip,Tool Options menu provides choice of simplified or expanded hierarchy view,MODULE LIST,Provides alphabetical list of unique modules in the elaborated design,Hover over module to view tooltip for info,Right-click popup menu provides:,Access to source file where module is defined,Ability to generate schematic symbol,Ability to generate testbench template,Set as top-level unit,Run BKM checks,DICTIONARY VIEW,Provides alphabetical list of unique resources in the elaborated design,Click on triangle by letter to expand for resources,Right-click popup menu on each resource provides:,Access to source file where module is defined,Different functions depending on which resource selected,Run BKM checks,HDL DIAGRAM,Provides graphical representation of modules in a design along with interconnects,Right-click popup menu provides:,Optional views,View as design root,Connectivity,Entity symbol,Instance symbol,Access to source files,Ability to generate schematic symbol,Ability to generate testbench template,Run BKM checks,BKM CHECKS,BKM (Best Known Methods) checks compared elaborated design to a list of design rules,Results shown in output log and HDL Diagram and Hierarchy views are color coded based on results,Rules to check are selectable options in the Tool Options menu,Select which rules to run,Set severity level for rule messages,Set color coding,IMPORTING FROM ISPLEVER,Start import by selecting ispLEVER project file,Import from File-Open,Import from Start Page,After selecting project file set import options,Set project name (first implementation is named the same),Set location for Diamond project,Default is the same location as ispLEVER project,Strongly recommend a different location,Set source files to copy or not,If not copied, source are referenced from original ispLEVER location,RECOMMENDED IMPORT FLOW OPTIONS,Project name should take into account filename length,When importing, project name is also used for implementation name,Files within an implementation use _.,Very long name is twice as long for most files,Diamond project directory should be different than ispLEVER directory,Not using a different directory will cause ispLEVER and Diamond files to be intermixed,Directory paths should not contain a “-” character,Copy source files to Diamond project unless specific reason not to do so (example: cvs),If files are shared, editing a file in Diamond causes the source to be changed for the ispLEVER project also,IMPORT ITEMS NEEDING MANUAL STEPS,Generated IP Files (NGOs),NGO files produced by IP generation need to be in the correct implementation directory or in a directory specified by the macro search path,NGO files are not copied during a project import,IPexpress Modules Need Regeneration,Diamond uses .ipx files for modules,Import will bring in .lpc files from existing ispLEVER designs,Modules cannot be used until the .lpc file is opened and the module regenerated,The .lpc file in the design will be replaced by .ipx file after regenerating,IPexpress PCS Module Configuration File,PCS module generates text configuration file,If module source imported instead of .lpc, configuration file must be manually copied to implementation directory,Power Calculator Project Files (.pep),ispLEVER Power Calculator .pep files are not compatible with Diamond,Diamond Power Calculator project (.pcf) file must be created manually,PROPERTIES VERSUS STRATEGIES,ispLEVER implementation settings done through properties for each process,Diamond offers single area to set all implementation tool settings (strategies),ispLEVER settings not copied due project import,Strategy settings need to be manually created,Diamond strategy settings can be copied between projects (unlike ispLEVER),ispLEVER,Diamond,STRATEGIES AND PROCESS FLOW,Editing strategy only affects later processes,Changing strategy map settings do not reset synthesis and translate design process status,Changing active strategy will reset the status of all processes,Creating different setting for map and par with multiple strategies is useful,Switching active strategies will however reset all processes,For quick runs, it is faster to edit an existing strategy rather than switching strategies,LAB 1: IMPORTING AND MODIFYING FOR DIAMOND,Create Diamond project from existing ispLEVER project,Regenerate modules,Edit strategy for implementation settings,AGENDA,Lattice Diamond Overview,Tool structure, usage, GUI,Differences from ispLEVER,Projects,Implementations & strategies, HDL checking,Importing from ispLEVER,Lab 1: Importing design and adding Lattice Diamond features,Process Flow and Tools,Implementation steps; synthesis, translate, map, PAR,Flow tools; run manager, trace report, simulation,Lab 2: Implementing a design and simulating,Key Tools and Tasks,IPexpress, spreadsheet / netlist / package / floorplan,Timing analyzer, SSO analysis, power calculator,Lab 3: Analyzing timing & power,Device programming, Reveal debugging,Lab 4: Programming & Reveal hardware debug,PROCESS FLOW OVERVIEW,Process view used to control implementation steps,Double-click to run,Right-click to open menu,Reports automatically generated and viewed from Reports view,ispLEVER used s
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